keremcant
Member level 5
hi,
we are trying to use this memory module on an FPGA. everything works but the reset. it does not reset the memory. the code is as following:
so we think that the problem is with the for loop, it this true? can you recommend us any way to reset the memory?
we are trying to use this memory module on an FPGA. everything works but the reset. it does not reset the memory. the code is as following:
Code:
module tirtik_hafiza3( input [6:0] tirtik,
input clock,
input reset,
input read_write,
output reg read_write_led,
output reg [6:0] mem_led
);
reg [6:0] mem [100:0];
reg [7:0] address;
reg change;
integer i;
always @ (posedge clock) begin
if(reset) begin
address <= 0;
change <= 1;
for(i=0;i<100;i=i+1)begin
mem[i] <= 7'b0000000;
end
end else if(read_write) begin
read_write_led <= 1;
mem[address] <= tirtik;
address <= address +1;
change <= 1;
end else if (!read_write) begin
if(!change)begin
read_write_led <= 0;
mem_led <= mem[address];
address <= address +1;
end else begin
address <= 0;
change <= 0;
end
end
end
endmodule
so we think that the problem is with the for loop, it this true? can you recommend us any way to reset the memory?