problem in Test Bench Waveform(TBW) in Xilinx Webpack 8.1i

[sriramsv]

Hi guys,

I've a problem while working with TBW in Webpack 8.1i. here are my codes:

module encoder(mesg,clk,cwd);
input [15:0]mesg;
input clk;
output [15:0]cwd;

wire [15:0]q; // o/p from the buffer i.e D_FF
wire [15:0]s_p;// o/p from the serial to parallel shifter

DFF d_ff0(mesg,clk,q);
SP s_p0(q,clk,s_p);
endmodule



module DFF(mesg,clk,q);
input [15:0]mesg;
input clk;
output reg[15:0]q;
// reg [15:0]x;
//assign q = x;
always @(posedge clk)
begin
q <= mesg;
end
endmodule

module SP(q,clk,s_p);
input [15:0]q;
input clk;
output [15:0]s_p;
reg [15:0]tmp;
//wire [15:0]mem_in;

assign s_p = tmp;
always @(posedge clk) begin
tmp = {tmp[14:0], q};
end

endmodule


The o/p of the D flip flop is given as the i/p to the serial to parallel shifter. it has no syntax errors and it compiles. but during the TBW stage, 2 different TBWs are created. One for the D flip flop and one for the S to P. I want the O/P of the D ff and also that of S to P in one waveform so that I can see the clock it takes to give the final O/P from the S to P. How to do it? if my coding is wrong, plz suggest me how to do.

Thanks

Sriram