[SOLVED] Presumably incorrect PEX DSPF / SPEF file generation using Calibre

[Narcisuss the Reborn]

Hello!

I have been studying parasitics extraction (PEX) netlists generated using Calibre Interactive by the example of common inverter and have found a strange feature: the extraction tool doesn't recognize the ground pin of circuit (VSS) and creates new node (net) for ground. The warning popping after PEX run ("No ground net name defined in PEX NETLIST statement and "0" will be used in the netlist") alerts about this. As result, parasitic capacitors between "VSS" and "0" as well as between "VDD" and "0" are determined which is incorrect, as I suppose.

I have tried to set specific "ground node name" in PEX Options tab - "VSS" in my case - but it didn't yield any direct results. In this case the extractor creates parasitic capacitances between "VSS" and "VSS" as well as between "VDD" and "VSS" (nonsense!).

I alse have tried to use the "gnd" instance (from analogLib library) instead of the pin. In that case capacitance between "VDD" and "GND" doesn't appear but there is still a capacitor between "GND" and "GND".

Besides DSPF format I have tried SPEF but results were the same. I aware about other possible PEX formats but only these two are fit for me.

The circuit and layout have been designed in Virtuoso (Cadence IC). DRC and LVS checks are both clean (including Extraction and Comparison results).

Could anyone gime me a cue how to fix this problem?

Thanks in advance!

 

[timof]

This is fine, a capacitance from VSS and VDD to ground play or to infinity - that becomes capacitance to net "0".

I actually always recommend to companies to use artificial net "0" as a ground - this way, you can easily separate capacitance form nets to VSS and to VDD (to real metals) vs capacitance to the ground plane.

Self-capacitace, i.e. capacitance form VSS to VSS is not a nonsense (although you normally do not see this in extracted netlists).
One reason is - coupling between metals of the same net, that have high resistance (e.g. long narrow metal line) between them.
Or capacitance from VSS to groudplane - and when you declare VSS as a ground, this becomes capacitance VSS to VSS.

Intricacies of parasitic extraction, that are not explained anywhere, even in user guides.

The format - DSPF vs SPEF - does not matter.
Capacitance calculations and assignment to nets / nodes are the same.

Your problem is not a problem, in fact.

Let me know if you have any other questions on parasitic extraction.

 

[Narcisuss the Reborn]

@timof, Thank you very much for your answer!

As I understand you, there will be correct to use PEX files directly (without any change) e.g. for post-layout simulation (not totally clear what have you meant by "you can easily separate capacitance form nets to VSS and to VDD (to real metals) vs capacitance to the ground plane")?

And another little question if possible: you said that there is no matter what format to use - DPSF or SPF. Indeed: when I compare parasitic capacitances and resistances in files of these formats (for my test inverter) they coincides in quantity, values and even order. But there is tiny discrepancy (up to 2%) during transient simulation of two extracted formats (Virtuoso ADE - Spectre). Do you know why could it be?

Thanks again!