mvvijay78
Member level 4
io pad lvs
Hi,
I would like to know how to use the PVDD1SDG and PVDD2SDG power pads in the TSMC pad library.It is given that the VDD1 pad is to be used for Core voltage and the VDD2 pad is to be used for IO voltage.But each of these pads have VDD: ,VSS: ,VSSPST: ,VD33 pins.How to connect the 1.8V applied to the pad input to the internal declared global net used to create the core rings.
Basically can anypne explain how do these power pads work?
Regards
Vicky
Hi,
I would like to know how to use the PVDD1SDG and PVDD2SDG power pads in the TSMC pad library.It is given that the VDD1 pad is to be used for Core voltage and the VDD2 pad is to be used for IO voltage.But each of these pads have VDD: ,VSS: ,VSSPST: ,VD33 pins.How to connect the 1.8V applied to the pad input to the internal declared global net used to create the core rings.
Basically can anypne explain how do these power pads work?
Regards
Vicky