PLL Design - Ring Oscillator

[dtzounakos]

Hi all,

I am new in the field of PLL design and i want a clear answer about ring oscillators. I have read some papers (especially Maneatis's papers) that the VCO core consist of "differential delay buffer stages". The term "differential delay buffer stage" means that the VCO core does not need an output buffer stage? In other words, the output buffer is incorporated in VCO core?
See the attached paper..


Thanks

 

[FvM]

The term "differential delay buffer"is a description of the structure and hasn't to with the capability to drive a particular load. You should look at the load impedance to determine if an output buffer is required. If you want to achieve a specific signal slew rate, it might be suggested.

 

[dtzounakos]

The term "differential delay buffer"is a description of the structure and hasn't to with the capability to drive a particular load. You should look at the load impedance to determine if an output buffer is required. If you want to achieve a specific signal slew rate, it might be suggested.

Thanks for your clear reply. So, if i have a load impedance, what output buffer you should suggest to me after a ring oscillator operated at frequency range 30-300MHZ? A differential source follower or a differential amplifier with diode connected PMOS load?

Thanks a lot!

 

[AdvaRes]

You will propably need a differential to single ended buffer. Here is a good starting point for you.
http://personalpages.to.infn.it/~cobanogl/CDR/vco_cern_mic-dg.pdf

 

[dtzounakos]

Thanks AdvaRes for your reply.. I will check the pdf that proposing to me.

Thanks again..