phase locked loop- should i use divide by N counter

[girish09]

I read PLL in Ramakant gayakwad reference book where they explained that VCO o/p frequency is N times the input frequency, so my query is we r trying to reduce VCO frequency towords value of Reference frequency so if VCo is producing N times higher frequency then they will never become same, as vco increases N times . In Somebook i read (at wikipedia also ) that Use Divide by N counter between VCO & Phase detector (i.e. in f/b path) but they said that divide counter is optional.

 

[bubuta77]

Phase detector can't work at such high frequencies that VCO produces (assume RF frequencies e.g.). Additionally your reference frequency is low too so to compare it with output frequency (to get a lock) you need to decrease output frequency (divide by N)

 

[etmabreu]

You can build a PLL with no divider (I did it several times).

Nevertheless, many questions are still to answer:
- What is your reference frequency?
- What is your output frequency?
- What are you building? A demodulator? A synthesized generator?
- Do you need your output frequency to be adjustable? What is the minimum step?
- Etc...