mayankatacadence
Newbie level 6
Seminar On Trends in PCB Design, High Speed Design and Cadence® Allegro® Integrated Solution
The Cadence ® Allegro ® technology optimizes the system interconnect in PCB Design, reduces costs, and accelerates time to market by enabling a constraint-driven, collaborative design across all design stages through integrated design environment.
The system interconnect is the logical, physical, and electrical connection of a signal, its associated return path .Design teams face unprecedented challenges in designing today's complex designs, with the growing integration of ICs, Signal Integrity, cross-talk issues in all markets segments namely computers,communication,consumers,automotive etc.
This session will discuss the challenges involved in designing PCB interconnects and Cadence's solutions to address these challenges.
Overview
This half-day technical seminar will discuss the design challenges involved in Interconnect Design (PCB design), solutions and techniques to address those challenges through presentations and demonstrations of Cadence Allegro platform products.
Featured products
Allegro PCB solutions for PCB design and Signal Integrity design. And Introduction to Package Design.
Date: Friday, March 14, 2008
Time: 9.30am – 1.30pm (lunch included)
Location: Hotel Le Meridien, RBM Road, Pune - 411001
Tel: 020 – 2605 0505
WHO SHOULD ATTEND?
· Electrical /Electronics Engineers
· PCB Designers
· Engineering/PCB design managers
· Electronics System designers
· Engineers from electronic product company
· Design service engineers
· Electronics manufacting Engineerss
To Register: Send empty email to jyothsna (at) cadence (dot) com with subject line "Register me to Seminar on trends and solutions for High speed PCB design - PUNE"
The Cadence ® Allegro ® technology optimizes the system interconnect in PCB Design, reduces costs, and accelerates time to market by enabling a constraint-driven, collaborative design across all design stages through integrated design environment.
The system interconnect is the logical, physical, and electrical connection of a signal, its associated return path .Design teams face unprecedented challenges in designing today's complex designs, with the growing integration of ICs, Signal Integrity, cross-talk issues in all markets segments namely computers,communication,consumers,automotive etc.
This session will discuss the challenges involved in designing PCB interconnects and Cadence's solutions to address these challenges.
Overview
This half-day technical seminar will discuss the design challenges involved in Interconnect Design (PCB design), solutions and techniques to address those challenges through presentations and demonstrations of Cadence Allegro platform products.
Featured products
Allegro PCB solutions for PCB design and Signal Integrity design. And Introduction to Package Design.
Date: Friday, March 14, 2008
Time: 9.30am – 1.30pm (lunch included)
Location: Hotel Le Meridien, RBM Road, Pune - 411001
Tel: 020 – 2605 0505
WHO SHOULD ATTEND?
· Electrical /Electronics Engineers
· PCB Designers
· Engineering/PCB design managers
· Electronics System designers
· Engineers from electronic product company
· Design service engineers
· Electronics manufacting Engineerss
To Register: Send empty email to jyothsna (at) cadence (dot) com with subject line "Register me to Seminar on trends and solutions for High speed PCB design - PUNE"
