negative propagation delay, tphl, tplh

[eahmadi]

negative propagation delay,tphl,tplh

Hi everyone,
I'm trying to calculate propagation delay of inverter in hspice with .measure.But I have got a problem: It is negative?
Is it correct?
Thanks in advance
Ebi

 

[crutschow]

Re: negative propagation delay,tphl,tplh

In the real world propagation delays obviously cannot be negative.

I don't know what the Hspice results were as you didn't post them.

 

[LvW]

Re: negative propagation delay,tphl,tplh

I'm trying to calculate propagation delay of inverter in hspice with .measure.

I don´t know what HSpice is doing after commanding ".measure".
However, if you are mixing propagation delay with group delay - the latter can be negative in reality.

 

[eahmadi]

Re: negative propagation delay,tphl,tplh

Thakns
I have an inverter like below:
Falling and Rising time of switching transistors

******************************************
******************************************


***********************************************************************
***********************************************************************
.param tsw=1us
.param vpulse=1.8v
.param lp=0.18u,ln=0.18u, multip=1500, multin=500


*****************************************
********* Circuit's elements **********
*****************************************

mP d1 g1 s1 s1 pch l=lp w=100u m=multip
mN d1 g1 gnd gnd nch l=ln w=100u m=multin


**************************************
********** Source Voltage **********
**************************************

vin s1 gnd dc 2v

***********************************************************************
********* PWM Pulse for driving switching transistor,mP & mN **********
***********************************************************************
vmp g1 gnd pulse vpulse 0 0 1ns 1ns 'tsw*(output/input)' tsw

****************************************************
***************** Analyses *************************
****************************************************

***** DC Analysis *****
***********************

.op ***** Operation Point Analysis

***** Transient Analysis *****
******************************

.tran 90ns 300us

.measure tran propagationdelay_HL trig v(g1) val='vpulse/2' rise=3 targ v(d1) val='vavg/2' fall=3 ******measuring propagation delay
*.measure tran propagationdelay_HL1 trig v(d1) val='vavg/2' fall=3 targ v(g1) val='vpulse/2' rise=3 ******measuring propagation delay

.measure tran propagationdelay_LH trig v(g1) val='vpulse/2' fall=3 targ v(d1) val='vavg/2' rise=3 ******measuring propagation delay
*.measure tran propagationdelay_LH1 trig v(d1) val='vavg/2' rise=3 targ v(g1) val='vpulse/2' fall=3 ******measuring propagation delay
.measure tran propagation param="0.5*(abs(propagationdelay_LH)+abs(propagationdelay_HL))"

.end

 

[erikl]

Re: negative propagation delay,tphl,tplh

Show your v(g1) & v(d1) curves!
I guess your "fall=3 ... rise=3" measure statements might not be correct: couldn't it be "fall=3 ... rise=4" ? Something like that.

 

[eahmadi]

Re: negative propagation delay,tphl,tplh

Hi dear Erikl,
today,I got something. When amplitude of Vin(DC voltage of pmos source and high voltage of inverter output) is equal to V(g1), the answer is positive. Because of the middle voltage for both vin and v(g1) is equal. But vin differs from 1.4v to 2v, each voltage in this range except of Vin=V(g1) has negative propagation delay. I think my circuit is true and negative propagation is cause because v(d1)/2 isn't equal to v(g1)/2 or Vin/2 isn't equal to v(g1)/2. Is my thought true?
Thanks dear Erikle,
Ebi

 

[erikl]

Re: negative propagation delay,tphl,tplh

... I think my circuit is true and negative propagation is cause because v(d1)/2 isn't equal to v(g1)/2 or Vin/2 isn't equal to v(g1)/2. Is my thought true?

Possibly. You should be able to see it, if you display v(g1) & v(d1) on the same time scale.

 

[eahmadi]

Re: negative propagation delay,tphl,tplh

when I display v(g1) and v(d1), I realized when amplitude of these voltage aren't equal, the output voltage(v(d1)) changes from high to low sooner than v(g1).
It's the negative value of propagation delay. Am I right?

 

[erikl]

Re: negative propagation delay,tphl,tplh

when I display v(g1) and v(d1), I realized when amplitude of these voltage aren't equal, the output voltage(v(d1)) changes from high to low sooner than v(g1). It's the negative value of propagation delay. Am I right?

Yes, I think so - if the trigger/target voltage levels are different.

I'd suggest you should change the trigger and target values from the voltage center values
to leaving the old true logic level value (input trigger) and attaining the new true logic level value (output target).

E.g. (for CMOS):

.meas tran pd_HL trig v(g1) val='vpulse/3'   rise=3 targ v(d1) val='vavg/3'   fall=3 ******measuring propagation delay

.meas tran pd_LH trig v(g1) val='vpulse*2/3' fall=3 targ v(d1) val='vavg*2/3' rise=3 ******measuring propagation delay

 

[eahmadi]

Re: negative propagation delay,tphl,tplh

Thanks dear Erikl,
In definition of the propagation delay said the voltage center value. Are your codes for propagation delay?
Sorry to bother you.
Thanks a lot.

 

[erikl]

Re: negative propagation delay,tphl,tplh

In definition of the propagation delay said the voltage center value.

Yes, but only if the input & output voltage levels are the same.
If they differ, this is an unfair method of approach - and might lead to negative prop.delay results, as in your case.

Are your codes for propagation delay?

Sure. Not only for prop. delay measurements, also for rise/fall time meas.

The 1/3 and 2/3 voltage levels in CMOS logic usually are guaranteed for receiving/triggering the true logic L/H (Low resp. High) values.
It's the standard method for time measurements at level shifters.