hamid123
Newbie level 5
hi i am trying to implement a fir filter that is in the paper that i attached its link below with vhdl . the problem is i cant find out what is inside the block diagrams in Figure3 .from section 3 in the paper it seems that we should use a state machine but i have some questions .
1- what is s(i) in state 1?
2- what should we do in state 3-6
3- what is tree shift adder i searched a lot but i couldn't find anything about it
thanks
https://ieeexplore.ieee.org/document/6568146/?reload=true
1- what is s(i) in state 1?
2- what should we do in state 3-6
3- what is tree shift adder i searched a lot but i couldn't find anything about it
thanks
https://ieeexplore.ieee.org/document/6568146/?reload=true