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keep working on simple and sample designs. You would like to take a look at this web-page as starting point: https://asic-world.com/verilog/. Tutorials and examples section is useful. Take a look at in combinational(eg. mux, comparator...) and sequential(eg. counter) example circuit designs and be aware of the differences.
Mainly what you should do is to download some digital logic and verilog ebooks and read them all, practice all examples.
And also if you be more specific about where you have problems, we can help more.
I need to pick up verilog to perform some simulation for a simple controller.. Do need some advice on this.
I have a set of simulation verilog files for the behaviour of a RAM.. It has its own testbench files to call 'task' and perform an operation.
Can i create an FSM for a controller and wrap this existing model? I need to make use of the existing output waveform behaviour and create my own testbenches to verify my logic.
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