b12345
Newbie level 6
In a layout, I put both NW and NWH over a 5V PMOS, as follows
Could someone please tell me what it affects?THX
The circuit shown as follows, in the test, if the IN is high, the output is high, but if the INis low, the output turns to high from low afer 58ms, and there are signs that a large current about 1mA produced between VDD and VSS, thus we suppose the overlap of NW and NWH change the function of the PMOS, but we don't know how it works
Could someone please tell me what it affects?THX
The circuit shown as follows, in the test, if the IN is high, the output is high, but if the INis low, the output turns to high from low afer 58ms, and there are signs that a large current about 1mA produced between VDD and VSS, thus we suppose the overlap of NW and NWH change the function of the PMOS, but we don't know how it works
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