Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

High voltage tolerant H bridge

pumpkinxs

Newbie
Joined
Sep 18, 2023
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
20
Hi,
I'm designing an H bridge that should tolerate up to 3 VDD (9.9 V) using the standard process and stacked transistor. However, the supply voltage will change from 9.9 V to a lower voltage since a capacitor provides the voltage. Is there any topology that can have a large voltage window such as 9.9 V to 5 V? Thank you!
 
Last edited:
Here's a cross-coupled H-bridge. Self-oscillating. Capacitor is power source, supplies 10V initially. Oscillations continue as capacitor discharges to small voltage (in simulation). Timeframe is 4 seconds.

H-bridge powered by cap (10V initial) self-oscill w inductor.png
 

LaTeX Commands Quick-Menu:

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top