Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
well the only parameter IMO that is of interest in this circuit would be the gate capacitance, the IRFZ44 having ~double the gate capacitance,
and the charge to the gate is coming via a 100k resistor.
Worst case is that resistor may need to be lowered, but IMO it should work anyway and the adjust delay will just behave a little different.
Strange circuit, so the opto actually discharges the gate voltage.......
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
