[Moved]: question about differential pair circuit on cadence

[tutroj]

in this circuit, how could i apply an appropriate DC bias to keep all 12 MOSFETs in saturation?

i heard there should be an equation to calculate? i'm quite confused!



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i'm sorry, how could i get the ICMR value then put it into the Vin+, Vin- then get the DC bias?

 

[erikl]

in this circuit, how could i apply an appropriate DC bias to keep all 12 MOSFETs in saturation?

Your circuit is already biased via the 20µA current source. If this is a correct value depends on your process and its model files. You'd perhaps have to adjust the current value and/or some W/L ratios until all MOSFETs are in saturation. M6 & M7 don't necessarily have to operate in saturation (could operate in triode region).

i'm sorry, how could i get the ICMR value then put it into the Vin+, Vin- then get the DC bias?
i heard there should be an equation to calculate? i'm quite confused!

M6 + M5 each need several hundred Millivolts of saturation voltage, so Vin+, Vin- should be a threshold voltage higher.

 

[tutroj]

so the vin_min=Vov1+Vov5+Vov6; Vin_max=Vdd-Vov3+Vth3, then use Vov=(2*Ibias/miu*Coxide*(w/L)) to calculate it, then input the value into DC analysis, to check each MOSFET in saturation? right?

 

[erikl]

vin_min=Vov1+Vov5+Vov6; Vin_max=Vdd-Vov3+Vth3

I'd say vin_min=(Vth+Vov)1+Vdsat5+Vdsat6; Vin_max=Vdd-|Vov3|-|Vth3|