victoriya
Member level 2
I have layouted an LNA and mixer . there is an error in LVS says the ntap is connected to gnd! and the error marker refers to the nwell of caps. I connect the bulk or pwell of transistors and caps to gnd . for the sake of this error i connect the nwell of caps and transistors to the vdd. for the transistors there is no difference between connecting their nwell to vdd or not but when i connect the caps nwell to the vdd there is an warning in LVS says the vdd and vss are shorted together. I connect the nwell and pwell by different metals and they are not connected together.also i have a problem in lna tran simulation(post layout simulation) where the pss analyses have no problem and i can see the tran signals by the pss! also the tran shows the total power of my circuit is 36MWATT!?? also the dc bias value isn't constant and after 5ns it increases gradually from 560mv and get the value of a few hundred volts at 10ns .I work in assura with Tsmc18rf technology.
is there any idea about these problems?
thanks in advance.
is there any idea about these problems?
thanks in advance.