ltspice problem implementing floating gate driving

[yefj]

Hello, I have implemented a gate driving of mosfet using UCC5304 as shown below .
I think this is how gate driving is implemented in real life.
However in LTspice its not working .I triem to put 100Mohm to do the floating as shown below.
However the signal is not following the pulse its just charges up and stays there as shown below.
LTspice files are attached.
How to implement this floating driving of a mosfet?
Thansks.

https://www.ti.com/lit/ds/symlink/ucc5304.pdf?ts=1715942587614&ref_url=https%253A%252F%252Fwww.google.com%252F

 

[FvM]

C2 should not be connected this way. I guess you want it to bypass Vdd.

 

[dick_freebird]

VGND through 1Mohm will surely hurt the isolation amplifier's
HL slew and if the coupling is capacitive, you need slew rate
clean inside.

You must represent the two grounds locally-correct (per part
operational needs) and then represent the connection between
domains - shared earth, vacuum or whatever really lies between
the two sections.

Cut and try is one way to go but a little step-back-and-think
has its place too.

 

[FvM]

Overlooked R1, it simply prevents regular operation of UCC5304. Of course V1, V3 and UCC5304 VGND must be connected to the same ground node.

 

[yefj]

Hello Dick_freebird,I have tried to make separated ground as shown below.
The right hand "grounds points" are connected to the left side official ground with 100MOhm
But as you can see in the plot below and the attached simulation files, Ltspice throws me an error.
Where did go wrong?
Thanks.

 

[FvM]

Found that UCC5304 model is defective, see below simple testbench.

Applying more than 2 V common mode between VGND and VSS switches the output either permanently on or off.

--- Updated May 18, 2024 ---

There's by the way another fault in your simulation circuit, duplicated net name vdd at M1.d and U1.vdd

 

[D.A.(Tony)Stewart]

The LTspice simulation works only with a limited common mode signal of +/- 1.8V.

I wonder if LTspice is missing the subcircuits specified for the Simplis application in the UCC5344.net (6k) file.

e.g.

.SUBCKT Simplis_BUFINV A Yn Yi Com
*
+ PARAMS:
+ VHi=5
+ VLo=0
+ RIn=10e6
+ Rout=10
+ Tdt=5e-9
+ Td=1p
+ Vt=2.5
+ VHWd=1
+ Vh=VHWd*0.5

 

[FvM]

Problem is that several subcircuits refer to global ground node 0 instead of input and output ground.

Obviously the Ltspice ported model has been never tested with floating in- or output ground. I tried a correction, it works at least with my test bench.