lunren
Member level 4
loop bandwidth
Considering power supply noise, if we want to decrease its effect on PLL, should we increase loop bandwidth or decrease bandwidth?
If the VCO is composed of transconductor (PMOS)+ICO+power match, I think the power supply noise has the some effect as the noise of loop filter on control voltage, which is a bandpass filter and the bandwidth is just the PLL loop bandwidth (=2*ζ*ωn). So if this is the case, we should decrease the bandwidth in terms of the power supply noise (at least for this specific VCO topology).
Any comments?
Lunren
Considering power supply noise, if we want to decrease its effect on PLL, should we increase loop bandwidth or decrease bandwidth?
If the VCO is composed of transconductor (PMOS)+ICO+power match, I think the power supply noise has the some effect as the noise of loop filter on control voltage, which is a bandpass filter and the bandwidth is just the PLL loop bandwidth (=2*ζ*ωn). So if this is the case, we should decrease the bandwidth in terms of the power supply noise (at least for this specific VCO topology).
Any comments?
Lunren