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It's one of the powerpoint presentations that went into making
"Essentials of Electronic Testing for Digital, Memory, and Mixed-Signal VLSI Circuits"
By Bushnell and Agrawal
I'm sorry dbshailesh, but can you be more specific about that which you are applying design-for-test? DFT is too big a big subject for someone to "post all dft rules and the solutions".
I just posted a list of 'top 10 scan design rules' over at DFT Digest. If you're looking for a complete set, and have access to Mentor documentation, you could look in the 'DFT Common Resources Manual' and they have all their DRCs listed.
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