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layout of a bandgap - detailed description needed

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kapilsn

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layout of a bandgap

Can anyone elaborate the detailed points to review a bandgap layout.
 

Hi,

Can you tell me how big is your ckt. Is it 1st order, 2nd Order......

I may can help u then
 

its will deal more about the matching of the diff amp in your layout.
 

I am afraid I not aware of the terms 1st order bandgap and 2nd order...my badgap consists of a x:1 ration of BJT to be matched ,a resistor network,and cascoded current mirrors.
 

The ckt you have is first order...

Following points should be taken care while designing a layout..
1. For BJT discuss with the designer what kind of matching is required for the ckt.
2. Resistor Network: use interdigitized matching
3. Current mirror: Common centroid matching

Hope I am able to help you to some extent. Please send me your schematic if possible, so that we can discuss it in more detail.
 

You must try to use interdigitized or interleave matching. try to maintain same bias potential in both arm. make sure that current mirror has same VDSAT and Vgs voltage, same current in both arm ?

are you using op-amp?
 

yes I do have a opamp in the circuit .What about the floor plan of the layout.Please see the attached floorplan.

whihc are the critical nets I should consider.I need the output at the top and the input coming from down.
 

kapilsn said:
yes I do have a opamp in the circuit .What about the floor plan of the layout.Please see the attached floorplan.

whihc are the critical nets I should consider.I need the output at the top and the input coming from down.

amplifier: most probably opamp.... in addtion to above mentioned points, take care of net matching of iboth the input of op amp... ie make lphysical parameters same.. you might need to extend metal to some extent..

current mirror: normal interdigitzed matching should do....

resistor matching : interdigitised matching

BJT : common centroid..

Added after 5 minutes:

for details art of analog layout is best book to refer
 

The key is to interdigitate the active components and with cap arrays the common centroid will prove a better space saver ( square shape).
 

Hi,

The main important point you must consider in the BandGab layout is the parasitic resistance, rather than parasitic capacitance.

So you have to Route using mult-Stack-Wide-metals between the BJT, Current mirrors, and Resistor Network
 

hey,

As per your floor plan in attachment, we cant comment more abt it unless we see the schematic, it is depends upon the ckt topology you used.

Related to BGR layout, important points are (An extension to pbobde's points)

1. Layout for BJT ratio x:1 is very important (Put single transistor in middle surrounded by number of x bjts, fully coverd by a guardring and make wide metal connection)
2. Resistor Network: use interdigitized matching should work
3. Current mirror: interdigitized matching should work
4. OPAMP:No doubt common centriod matching for diff pair

I guess this is more than enough, if you still have doubt fell free to write to dipak.etrxeng@gmail.com or continue with the same conversation, so that other will also get some help

enjoy ...................
 

Hi,
can any one plz tell me how to change the emitter area in Multisim 10?
i have to match two BJTs of 10:1 ratio.
 

Normally you use pre-determined device layouts. Also, for a bandgap you don't want two different transistors - one with an area 10 times the other. You use ten small transistors in parallel for the large one (and lay it out so the single one is in the middle of the 10)

Keith
 

thanx alot for ur reply keith!
but isnt there any means of change in the BJT model itself, so tht i can have an emitter area of 10 times the other one in MULTISIM 10?
 

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