Lattice ICE40HX8K unresponsive when programed

[salmanmahmood]

Hi All,

I have designed a breakout board/evaluation board for ICE40HX8K-CT256 that is an exact copy (schematics wise) of the official board available by lattice. I had a lot of issues with the design but have narrowed them down. Originally, in the schematic, the FPGA is being programmed by FT2232H using SPI. This was not working so I ordered a programming cable form Lattice HW-USBN-2B (https://www.latticesemi.com/Products/DevelopmentBoardsAndKits/ProgrammingCablesforPCs.aspx) to bypass the FTDI chip and directly program the FPGA.

This is now working but the FPGA is still unresponsive. By working I mean it shows no errors in the programing software (Diamond programmer by Lattice), however, all the IOs are at 3.3V regardless of what the VHDL code says. I am running a very basic VHDL code that just turns the IOs on and off and it is working on the evaluation board.

Very confused why this is happening.

The evaluation board I am using is: https://www.digikey.de/product-deta...rporation/ICE40HX8K-B-EVN/220-1874-ND/4738851

Thanks in advance for the help,
Regards,
Salman

 

[KlausST]

Hi,

Because the original design is working, but yours not, it is very likely that there is an error in your design.
Therefore we need to see your schematic and your PCB layout.

Klaus

 

[salmanmahmood]

Hi Klaus,

Thanks for your reply.

I went through my design again. The schematic is an exact replica of the official schematic. As for the board layout, I dont have the official layout but have followed the layout guidelines. Any suggestions what I should do?

Regards,
Salman

- - - Updated - - -

The schematics are attached. The BreakOutBoard_EB85.pdf is the official design by lattice.

Thanks,
Salman

 

[KlausST]

Hi,

how many differences may an "exact replica" have?

* post your PCB layout.
* check 12MHz at FTDI with a scope
* check 12MHz at FPGA with a scope
* check VPHY at FTDI with a DMM (DC voltage level) and with a scope (ringing)
* check VPLL at FTDI with a DMM (DC voltage level) and with a scope (ringing)

Klaus

 

[salmanmahmood]

Hi,

As I mentioned in my earlier post, I am now directly programing the FPGA without the FTDI, literally, I have no FTDI chip on either boards, both of them removed on the PCB.

I am using the HW-USBN-2B (**broken link removed**) programing cable and programing the fpga over SPI.

Regards,
Salman

- - - Updated - - -

Please see attached. These are eagle files. Let me know if you want it in PDF format

 

[KlausST]

Hi,

Yes, I noticed that you don´t use the FTDI.
(I often used the FTDIs and never had problems with them)

But you said FTDI is not working... and FPGA is not working as expected.
Therefore I searched for signals that are connected both the FTDI and the FPGA.
And the clock signal may be urgent. Urgent for the FTDI and urgent for the FPGA.
Therefore I asked you to measure it.

The PCB layout isn´t bad.

In your schematic there are the two inductors L201 and L202, that are not in the original schematic.
Those may create an (undamped) resonace with their surrounding capacitors C202, C203, C204, C205. Especially when there is a PLL creating some noise.

Therefore I asked you to measure the voltages. AC and DC.

Klaus

 

[salmanmahmood]

Hi Klaus,

Thanks for the replies man. I will measure the indicated signals and get back to you as soon as possible.

Regards,
Salman

 

[FvM]

all the IOs are at 3.3V regardless of what the VHDL code says

Just tells you that the device stays unconfigured.

Check the SPI slave configuration process description in iCE40 Programming and Configuration document and determine at which point it is failing.

 

[salmanmahmood]

Understood. Will proceed accordingly. Thanks again

 

[salmanmahmood]

Its the smallest things that matter. The programing configuration was wrong. I still have a small issue, the signals dont get updated unless I power cycle the board/ restart the board. Any ideas?