yeyeb
Newbie level 2
I am doing a very simple test to read off from the register and i cant even do that. I am tryin to load the written register data to the LEDs and so far i see nothing. Can anyone check the code to see if i made a mistake?
module usb_test4 (
CLOCK_50,
KEY,
SW,
OTG_DATA, // ISP1362 Data bus 16 Bits
OTG_ADDR, // ISP1362 Address 2 Bits
OTG_CS_N, // ISP1362 Chip Select
OTG_RD_N, // ISP1362 Write
OTG_WR_N, // ISP1362 Read
OTG_RST_N, // ISP1362 Reset
OTG_FSPEED, // USB Full Speed, 0 = Enable, Z = Disable
OTG_LSPEED, // USB Low Speed, 0 = Enable, Z = Disable
OTG_INT0, // ISP1362 Interrupt 0
OTG_INT1, // ISP1362 Interrupt 1
OTG_DREQ0, // ISP1362 DMA Request 0
OTG_DREQ1, // ISP1362 DMA Request 1
OTG_DACK0_N, // ISP1362 DMA Acknowledge 0
OTG_DACK1_N, // ISP1362 DMA Acknowledge 1
LEDG, // LED Green[8:0]
LEDR // LED Red[17:0]
);
input CLOCK_50;
input [17:0] SW;
input [3:0] KEY;
input OTG_DREQ0; // ISP1362 DMA Request 0
input OTG_DREQ1; // ISP1362 DMA Request 1
input OTG_INT0; // ISP1362 Interrupt 0
input OTG_INT1; // ISP1362 Interrupt 1
inout [15:0] OTG_DATA; // ISP1362 Data bus 16 Bits
output [1:0] OTG_ADDR; // ISP1362 Address 2 Bits
output OTG_RST_N; // ISP1362 Reset
output OTG_CS_N; // ISP1362 Chip Select
output OTG_DACK0_N; // ISP1362 DMA Acknowledge 0
output OTG_DACK1_N; // ISP1362 DMA Acknowledge 1
output OTG_RD_N; // ISP1362 Write
output OTG_WR_N; // ISP1362 Read
output OTG_FSPEED; // USB Full Speed, 0 = Enable, Z = Disable
output OTG_LSPEED; // USB Low Speed, 0 = Enable, Z = Disable
output [8:0] LEDG; // LED Green[8:0]
output [17:0] LEDR; // LED Red[17:0]
reg chip_enable;
reg chip_reset;
reg ack;
reg [1:0] address;
reg [15:0] data;
reg read_chip; // ISP1362 Write
reg write_chip ; // ISP1362 Read
reg [3:0] bytes8 = 4'b0000;
reg [3:0] bytes16 = 4'b0001;
reg [3:0] bytes32 = 4'b0010;
reg [3:0] bytes64 = 4'b0011;
reg [3:0] EP1 = 4'b0010;
reg [3:0] EP2 = 4'b0011;
reg [3:0] EP3 = 4'b0100;
reg [3:0] EP4 = 4'b0101;
reg [3:0] EP5 = 4'b0110;
reg [3:0] EP6 = 4'b0111;
reg [3:0] EP7 = 4'b1000;
reg [3:0] EP8 = 4'b1001;
reg [3:0] EP9 = 4'b1010;
reg [3:0] EP10 = 4'b1011;
reg [3:0] EP11 = 4'b1100;
reg [3:0] EP12 = 4'b1101;
reg [3:0] EP13 = 4'b1110;
reg [3:0] EP14 = 4'b1111;
reg OUT=0;
reg IN=1;
reg [8:0]led_green_fcn;
reg [17:0]led_red_fcn;
assign OTG_CS_N = !chip_enable;// not
assign OTG_RST_N = !chip_reset;//not // ISP1362 Reset
assign OTG_DACK1_N = ack; // ISP1362 DMA Acknowledge 1
assign OTG_RD_N = !read_chip; //not // ISP1362 Write
assign OTG_WR_N = !write_chip; //not // ISP1362 Read
assign OTG_FSPEED = 1'bz; // USB Full Speed, 0 = Enable, Z = Disable
assign OTG_LSPEED = 0; // USB Low Speed, 0 = Enable, Z = Disable
assign OTG_ADDR = address;
assign OTG_DATA = data;
assign LEDG = led_green_fcn;
assign LEDR = led_red_fcn;
initial begin
chip_reset=1;
chip_reset=0;
end
initial begin
led_red_fcn= 18'b000000000000000001 ;
//DMACounter( read_write, size )
DMACounter( 1, 16'h3333 );
end
always @(posedge CLOCK_50) begin
if (SW[1]) begin
DMACounter( 0, 16'h1111 );
//led_red_fcn= data;
end else begin
//led_red_fcn=0;
DMACounter( 1, 16'h2222 );
end
end
task command_out ;
input [3:0] code;
rw_reset();
chip_enable=1;
write_chip = 1;
address = 2'b11;
data[3:0] = code;
rw_reset();
endtask
task data_out;
input [15:0] code;
rw_reset();
chip_enable=1;
write_chip=1;
address= 2'b10;
data = code;
rw_reset();
endtask
task data_in;
rw_reset();
//input [15:0] code;
chip_enable=1;
read_chip=1;
address= 2'b11;
led_red_fcn[15:0] = data;
rw_reset();
endtask
task rw_reset;
chip_enable=0;
write_chip= 0;
read_chip = 0 ;
address=0;
data_reset();
endtask
task data_reset;
data = 16'b0000000000000000;
endtask
task DMACounter; // DMACounter(.read_write(), .size() )
input read_write;
input [15:0] size;
reg [15:0] all;
all=size;
if (read_write) begin
command_out(2'hF2);
data_out(all);
end else begin
command_out(2'hF3);
data_in();
end
all=16'b0000000000000000;
endtask
endmodule
module usb_test4 (
CLOCK_50,
KEY,
SW,
OTG_DATA, // ISP1362 Data bus 16 Bits
OTG_ADDR, // ISP1362 Address 2 Bits
OTG_CS_N, // ISP1362 Chip Select
OTG_RD_N, // ISP1362 Write
OTG_WR_N, // ISP1362 Read
OTG_RST_N, // ISP1362 Reset
OTG_FSPEED, // USB Full Speed, 0 = Enable, Z = Disable
OTG_LSPEED, // USB Low Speed, 0 = Enable, Z = Disable
OTG_INT0, // ISP1362 Interrupt 0
OTG_INT1, // ISP1362 Interrupt 1
OTG_DREQ0, // ISP1362 DMA Request 0
OTG_DREQ1, // ISP1362 DMA Request 1
OTG_DACK0_N, // ISP1362 DMA Acknowledge 0
OTG_DACK1_N, // ISP1362 DMA Acknowledge 1
LEDG, // LED Green[8:0]
LEDR // LED Red[17:0]
);
input CLOCK_50;
input [17:0] SW;
input [3:0] KEY;
input OTG_DREQ0; // ISP1362 DMA Request 0
input OTG_DREQ1; // ISP1362 DMA Request 1
input OTG_INT0; // ISP1362 Interrupt 0
input OTG_INT1; // ISP1362 Interrupt 1
inout [15:0] OTG_DATA; // ISP1362 Data bus 16 Bits
output [1:0] OTG_ADDR; // ISP1362 Address 2 Bits
output OTG_RST_N; // ISP1362 Reset
output OTG_CS_N; // ISP1362 Chip Select
output OTG_DACK0_N; // ISP1362 DMA Acknowledge 0
output OTG_DACK1_N; // ISP1362 DMA Acknowledge 1
output OTG_RD_N; // ISP1362 Write
output OTG_WR_N; // ISP1362 Read
output OTG_FSPEED; // USB Full Speed, 0 = Enable, Z = Disable
output OTG_LSPEED; // USB Low Speed, 0 = Enable, Z = Disable
output [8:0] LEDG; // LED Green[8:0]
output [17:0] LEDR; // LED Red[17:0]
reg chip_enable;
reg chip_reset;
reg ack;
reg [1:0] address;
reg [15:0] data;
reg read_chip; // ISP1362 Write
reg write_chip ; // ISP1362 Read
reg [3:0] bytes8 = 4'b0000;
reg [3:0] bytes16 = 4'b0001;
reg [3:0] bytes32 = 4'b0010;
reg [3:0] bytes64 = 4'b0011;
reg [3:0] EP1 = 4'b0010;
reg [3:0] EP2 = 4'b0011;
reg [3:0] EP3 = 4'b0100;
reg [3:0] EP4 = 4'b0101;
reg [3:0] EP5 = 4'b0110;
reg [3:0] EP6 = 4'b0111;
reg [3:0] EP7 = 4'b1000;
reg [3:0] EP8 = 4'b1001;
reg [3:0] EP9 = 4'b1010;
reg [3:0] EP10 = 4'b1011;
reg [3:0] EP11 = 4'b1100;
reg [3:0] EP12 = 4'b1101;
reg [3:0] EP13 = 4'b1110;
reg [3:0] EP14 = 4'b1111;
reg OUT=0;
reg IN=1;
reg [8:0]led_green_fcn;
reg [17:0]led_red_fcn;
assign OTG_CS_N = !chip_enable;// not
assign OTG_RST_N = !chip_reset;//not // ISP1362 Reset
assign OTG_DACK1_N = ack; // ISP1362 DMA Acknowledge 1
assign OTG_RD_N = !read_chip; //not // ISP1362 Write
assign OTG_WR_N = !write_chip; //not // ISP1362 Read
assign OTG_FSPEED = 1'bz; // USB Full Speed, 0 = Enable, Z = Disable
assign OTG_LSPEED = 0; // USB Low Speed, 0 = Enable, Z = Disable
assign OTG_ADDR = address;
assign OTG_DATA = data;
assign LEDG = led_green_fcn;
assign LEDR = led_red_fcn;
initial begin
chip_reset=1;
chip_reset=0;
end
initial begin
led_red_fcn= 18'b000000000000000001 ;
//DMACounter( read_write, size )
DMACounter( 1, 16'h3333 );
end
always @(posedge CLOCK_50) begin
if (SW[1]) begin
DMACounter( 0, 16'h1111 );
//led_red_fcn= data;
end else begin
//led_red_fcn=0;
DMACounter( 1, 16'h2222 );
end
end
task command_out ;
input [3:0] code;
rw_reset();
chip_enable=1;
write_chip = 1;
address = 2'b11;
data[3:0] = code;
rw_reset();
endtask
task data_out;
input [15:0] code;
rw_reset();
chip_enable=1;
write_chip=1;
address= 2'b10;
data = code;
rw_reset();
endtask
task data_in;
rw_reset();
//input [15:0] code;
chip_enable=1;
read_chip=1;
address= 2'b11;
led_red_fcn[15:0] = data;
rw_reset();
endtask
task rw_reset;
chip_enable=0;
write_chip= 0;
read_chip = 0 ;
address=0;
data_reset();
endtask
task data_reset;
data = 16'b0000000000000000;
endtask
task DMACounter; // DMACounter(.read_write(), .size() )
input read_write;
input [15:0] size;
reg [15:0] all;
all=size;
if (read_write) begin
command_out(2'hF2);
data_out(all);
end else begin
command_out(2'hF3);
data_in();
end
all=16'b0000000000000000;
endtask
endmodule