Is it possible to do facial recognition by verilog?

[image processing through]

Hi i am doing electronics engineering and wants to do image processing on FPGA board of spartan 3e by verilog. I am new to FPGA and dont have enough knowledge regarding this project, i have heard from someone that for image processing on FPGA i have to develop hardware other than spartan board on a specialized software. now i am stuck what to do. please help me to et rid of this problem. thanks in advance.

 

[farhada]

Simple answer is yes, but it is VERY VERY VERY difficult.

 

[image processing through]

thanks for your response.if yes then it means it is a do able task then i can try anf it is my Final year project. Pls help me in this regard and suggests me some sources which helps me.

 

[mux_master]

Developing a hardware face recognition is not an easy task. It is probably not something that would be recommended for someone with limited experience with HDL design. You may want to start by researching some facial recognition algorithms and then analyzing them to decide how they could be realized in hardware.

 

[alainsan]

I am just curious as to the system-level requirements...

gozins:
what would the input signal be? a fixed picture? how many pixels? how many bits on each pixel? is there a superior algorithm which could be translated into HDL?

gozouts:
what are the key facial characteristics to be identified?

performance:
how fast should the image be processed?

Just looking for some real practical numbers.
Thank you.

 

[ewan]

i think its difficult. but it is good to try...

 

[image processing through]

thanks to all for ther repsonse i want to try but don't getting any idea from where to start and also the pathway on which i have to run(not to walk) for completeion of this project. pls help me in starting the core algorithm and also the its hardware implementation.thanks

 

[farhada]

Ok, just a friendly advice, if you don't even know where to start, then DON'T do it. This is a project that even Signal processing and Verilog experts would think twice before starting, for an engineer this will be a nightmare.

If you really need to do this in a HDL, then look into some kind of soft processor (Nios, MicroBlaze etc) and then implement the high-level recognition in C or C++, this way, you will have a chance to finilaze the project or else you end up with nothing.

But, this is just an advice from an FPGA engineer with 20 years of experience,

Best regards,
/Farhad Abdolian

 

[samu1988]

hello, I am looking to implement the same using VHDL, did u succeed?? how far did u get?
I have been lookin at various algorithms too.. but hv no clue where to get started

 

[vipinlal]

I suggest you first implement the algorithm in Matlab. That itself will take a long time. dont go for hardware design directly.