Initialization of FIFO using ModelSim Testbench

[imbichie]

Hey all,

I am working with an I2C Core, now i meet a problem with initialization of FIFO,

How i initialize the FIFO using the ModelSim Testbench, means without disturbing the

I2C Master Program. i am working with VHDL

Thanks in Advance

 

[vipinlal]

What is the size of your FIFO?
I will use a for loop for initialization of a block memory.But it will take time since the FIFO write is clock controlled.

for i in 0 to FIFOsize loop 
  data_in_FIFO <= (others => '0');
  wait for clk_period;
end loop;

Is this what you are looking for?

--vipin
https://vhdlguru.blogspot.com/

 

[TrickyDicky]

What is the size of your FIFO?
I will use a for loop for initialization of a block memory.But it will take time since the FIFO write is clock controlled.

for i in 0 to FIFOsize loop 
  data_in_FIFO <= (others => '0');
  wait for clk_period;
end loop;

Is this what you are looking for?

--vipin
https://vhdlguru.blogspot.com/

Why would you want to zero the fifo on every clock?

 

[vipinlal]

I thought he wanted to initialize all the FIFO values to some CONSTANT value.It can be zero or anything else.Does that matter?
Is there any way to initialize a FIFO?

 

[imbichie]

Thank you for your reply

But this initialization is via our main VHDL program na,

i need to initialize the fifo via my testbench, in my

testbench how i access the fifo signal

 

[ckaa]

If I understood you right this is what you want to do -
Bring out your FIFO signals as ports in your i2c core instantiation which will allow you to access your FIFO signals in the testbench. Now you can manipulate your FIFO signals in your testbench.