incrementing constant delcaration in vhdl

[joeka]

Hi,

I declared some registers as constant in vhdl. I'd like to send them to a component via spi. However there are more than 1000 registers to send.

All of registers are declared as :


-- address
constant REG0000 : std_logic_vector(15 downto 0):= x"0000";
constant REG0001 : std_logic_vector(15 downto 0):= x"0001";
...
constant REG03FF : std_logic_vector(15 downto 0):= x"03FF";

--datas
constant REGV0000 : std_logic_vector(15 downto 0):= "0000010";
constant REGV0001 : std_logic_vector(15 downto 0):= "0001001";
...
constant REGV03FF : std_logic_vector(15 downto 0):= "0100100";


I'd like to send all the registers by incrementing the constant value : something like REG <= "REG"&i;

I tried to create a string but it does'nt work.

Any idea ?

Thanks

Joeka

 

[FvM]

Not actually clear what you tried to achieve. A constant value can be altered e.g. in a generate loop but not in regular concurrent or sequential code. That's why we call it a constant.

 

[joeka]

Actually, I don't want to modify constant values. I just want to read them in a loop but i don't know how to increment the reading.

 

[FvM]

Oh, I didn't see at first view what you meaned with this funny "REG"&i expression. There's no VHDL syntax to generate dynamical object names. By the way, do you know a hardware description or programming language that has it?

Please get a VHDL text book and take a look at arrays. There are also arrays of constants.

 

[joeka]

Thank you for your help. I'm gonna take a look at arrays.