Implement "Reset" pin for FPGA

[djnik1362]

hi

i want to produce a system on Spartan-II FPGA that have an input reset.
this input allow to reset all building blocks in FPGA.

for example if i have 100 internal module this input must be wire-up to all of them.

So my question is :

Is there any special input for this or i can use regular I/O of FPGA to do this.

Thanks.

 

[hallovipin]

u can use regular IO. Just you have to read it in all your module while doing programming.

 

[Chops211]

Just remember how your reset is sent. Make sure you code the reset to be the same polarity as the button (pullup or pulldown). Also, it is good practice to have a synchronous reset rather than an asynchronous reset.

 

[rca]

normally the tool checks the fanout of the different net in the design, and promote the highest of them on global net to have a better skew/transition. I believe you could force a net to used a global net.