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I2C (=IIC =Inter-Integrated-Circuit)
Intended for communication between IC's on a single board but sometimes used between boards.
Only two signal wires needed: clock and data
Single duplex
Not usually fast - 100Kb/s and 400kb/s are the usual modes. Faster are available but not widely supported.
IC's each have a selectable address, allowing selective communication with multiple devices on the bus
True multimaster - with collision avoidance and bus arbitration I2C-Bus: What's that?
SPI (Serial Peripheral Interface)
Three or more signal wires needed (clock, data in, data out and multiple slave selects)
Full duplex operation
Fast - typical rates of 10MHz, 20MHz or much faster especially on FPGA
With multiple devices on the bus, the target must be selected by an out-of-band chip (slave) select wire
Devices operate as master, slave or both Serial Peripheral Interface Bus - Wikipedia, the free encyclopedia
RS-232
One or more signal wires (TX, RX, ready to send, clear to send; simplest one-way might just use one wire - TX or RX)
Generally intended for communications between just two devices
Handshaking wires can be optionally used for control of data flow
Typically used for long, inter-equipment links
Asynchronous, needs accurate data rate control and oversampling at the receive end for high speeds
Typically slow speeds (from 300 baud to 115,200 baud) but much faster is possible on very fast custom logic
True RS232 typically uses around +/- 12V for RX/TX levels - needs a level converter to logic but gives long possible cable length
Logic-level RS232 (e.g from an MCU) is more susceptible to interference over long distances RS-232 - Wikipedia, the free encyclopedia
I²C, SPI and RS-232 are categorized into two groups of serial communication protocol/standards, synchronous and asynchronous:
Synchronous
I²C - The Inter-Integrated Circuit Protocol (I²C), aka 2-Wire Interface, is a synchronous serial protocol which utilizes only two Open Drain lines to implement a Serial Data/Address Line (SDA) and a Serial Clock Line (SCL). I²C was original developed by Philips and is a superset of the Intel's SMBus.
I²C uses only two bidirectional open-drain lines, Serial Data Line (SDA) and Serial Clock (SCL), pulled up with resistors. Typical voltages used are +5 V or +3.3 V although systems with other voltages are permitted.
The I²C reference design has a 7-bit or a 10-bit (depending on the device used) address space[2]. Common I²C bus speeds are the 100 kbit/s standard mode and the 10 kbit/s low-speed mode, but arbitrarily low clock frequencies are also allowed. Recent revisions of I²C can host more nodes and run at faster speeds (400 kbit/s Fast mode, 1 Mbit/s Fast mode plus or Fm+, and 3.4 Mbit/s High Speed mode). These speeds are more widely used on embedded systems than on PCs. There are also other features, such as 16-bit addressing.
SPI - The Serial Peripheral Interface Standard (SPI), aka 4-wire interface, is a synchronous serial protocol originally developed by Motorola which utilizes only four lines to implement a Serial Clock (SCLK/SCK/SCL), a Master Output, Slave Input or Serial Data Out (MOSI/SDO), a Master Input, Slave Output or Serial Data In (MISO/SDI) and a Slave Select (SS/NSS). The separate data input and data output lines of SPI allow for Full Duplex Communications. There are other naming conventions used to designate the various line, I have only listed a few of the more commonly used.
Reference: **broken link removed**
SPI devices communicate using a master-slave relationship. Due to its lack of built-in device addressing, SPI requires more effort and more hardware resources than I2C when more than one slave is involved. But SPI tends to be simpler and more efficient than I2C in point-to-point (single master, single slave) applications for the very same reason; the lack of device addressing means less overhead.
More detailed reference material and tutorials are usually available from the manufacture of the device you are implementing either I²C or SPI.
Asynchronous
RS-232 - The Recommend Standard 232 (RS-232) development began back in the days of Teletypes, as such there are many references to these devices in the standard as well as the accompanying American Standard Code for Information Interchange (ASCII) character encoding scheme which is often utilized with RS-232 communications. RS-232 was developed as an asynchronous data and control standard to establish communications between a DTE (Data Terminal Equipment) and a DCE (Data Circuit-terminating Equipment). RS-232 requires the use of proper transceivers, like the MAXIM MAX232, at both the DTE and DCE and the minimum of three lines to establish communications, a Transmit (TX), a Receive (RX) and Common Ground (GND). There are however numerous other control lines, some are still used quite frequently, others rarely today.
The RS-232 standard defines the voltage levels that correspond to logical one and logical zero levels for the data transmission and the control signal lines. Valid signals are plus or minus 3 to 15 volts; the ±3 V range near zero volts is not a valid RS-232 level. The standard specifies a maximum open-circuit voltage of 25 volts: signal levels of ±5 V, ±10 V, ±12 V, and ±15 V are all commonly seen depending on the power supplies available within a device. RS-232 drivers and receivers must be able to withstand indefinite short circuit to ground or to any voltage level up to ±25 volts. The slew rate, or how fast the signal changes between levels, is also controlled.
For data transmission lines (TxD, RxD and their secondary channel equivalents) logic one is defined as a negative voltage, the signal condition is called marking, and has the functional significance. Logic zero is positive and the signal condition is termed spacing. Control signals are logically inverted with respect to what one sees on the data transmission lines. When one of these signals is active, the voltage on the line will be between +3 to +15 volts. The inactive state for these signals is the opposite voltage condition, between −3 and −15 volts. Examples of control lines include request to send (RTS), clear to send (CTS), data terminal ready (DTR), and data set ready (DSR).
Because the voltage levels are higher than logic levels typically used by integrated circuits, special intervening driver circuits are required to translate logic levels. These also protect the device's internal circuitry from short circuits or transients that may appear on the RS-232 interface, and provide sufficient current to comply with the slew rate requirements for data transmission.
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