how to use ip coregen......

[watabe112]

hi...can anyone give me an example on how to write code for xilinx ipcore gen....for example if i want to find mean.....mean=(a+b)/2........so i need add and division module....how i'm going to write the verilog code in order to find the mean....using the 2 core.....

 

[vipinlal]

I have some examples in vhdl which is about xilinx ip core regen:
VHDL coding tips and tricks: How to use Core generator to build IP cores?
VHDL coding tips and tricks: Binary counter IP core in Xilinx Core Generator

I hope they will give you a basic idea.

 

[mrflibble]

For a practical circuit you can just write the sum as

sum <= (a + b);

And the synthesis tool will take care of that for you. No coregen needed, unless for whatever reason you really want to...

For the division, if it is divide by two, you could just shift the sum by 1 bit...

And if you really really have to use the coregen, also see my reply to your other post.

hope that helps.