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hi Blackuni,
i am designing a BGR to generate a voltage about 0.6volts. I have finalised an architecture which is used for sub-1-v BGR without low Vth transistors and resisitive divide network. But my confusion is that how to size the BGR, like emitter are, base area or else. Also How exactly the temperature depence (PTAT & CTAT) will get cancelled each other with this architecture.
Usually, the BJT drawing size provided by foundary is used for design due to modeling accuracy. As for BJT area ratio of the PTAT part, it depend on the offset voltage of the OPA used in bandgap. If you want to have small statistics deviation of your 1.25V output during production, you can choose 1:24 or larger. Or you can try to minimize the offset of the OPA, then 1:8 ratio is OK,too.
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