how to simulate the number of time constants

[SwordFish]

I want to make a Sample and hold circuit.
I want to know if there is a way to simulate and plot graphically the number of time constants.

To be more specific : I know from behavioral model that 1 time constant is max 30ns. The Tsample is 250ns. So the minimum UGF is 1/(2pi*tau)=5.3MHz.
But if I'm looking on transient simulation I'm not so convinced that is enough. So I need to somehow be sure that the accuracy is meet by plotting the time/tau ratio. There is a specific formula for that ? or a specific simulation setup ?
basically I need to see if at the end of the Tsample time the Tsample/tau is higher than 250n/30n=8.33.
The OTA used is a real cmos cell and there are also many poles.

Only the fact that UGF is higher than 5.3MHz in all corners is enough to assure the good settling ? How to deal with slew rate ?
This is the reason that I cannot trust 100% in UGF to set my accuracy.

Someone know how to solve this ?
There is a way to actually measure the time constant on a transient plot ?
Please be aware that the system is complex and not 1pole like in books from universities. So the 1tau=63% from signal is not true.

Thanks for any ideas.

 

[dgnani]

what simulator are you using?

 

[SwordFish]

spectre .
What has the simulator with the time constant ??!!??

 

[dgnani]

Running optimization you can usually set termination conditions, I have to browse through docs... it is not going to happen today though...

 

[SwordFish]

thanks dgnani.

So you had the same issue in the past ?

 

[erikl]

... I need to somehow be sure that the accuracy is meet by plotting the time/tau ratio.

The OTA used is a real cmos cell and there are also many poles.

... the system is complex and not 1pole like in books from universities. So the 1tau=63% from signal is not true.

May be you can use a different approach:

From a transient analysis, find the time t necessary to reach the required accuracy, e.g. 1 - V/V0 ≤ 1/1024 ≈ 1‰ for a 10-bit resolution. Then you could relate this time t to an effective time constant τ via the relation for a simple RC charging: The error (the difference between the voltage at the sample cap and the voltage to be sampled) after time=t is 1-(V/V0) = e^(-t/τ) , and this error should be equal or less than the required resolution, which is 1bit/(2^b)bit.

Hence 1/(2^b) ≤ e^(-t/τ)

ln(1/(2^b)) ≤ -t/τ

ln(2^b) ≤ t/τ

τ ≤ t/ln(2^b)

Then your effective sample time constant τ would be τ ≤ t/7 for the above example of a (better than) 10-bit resolution (in-)accuracy.

Don't know if this approach is helpful to you.

 

[SwordFish]

thanks but your proposed method give errors if the DC gain is less than infinite.
For a simple S/H (ideal switch and capacitor) is ok since the at the end of sampling time the Vo will go asymptotically to Vin.
But if there is any gain involved, the DC gain will affect the ratio Vo/Vin. So for example if you make a corner simulation you will obtain a different result not because the tau is different but because the DC gain give a different Vo.

beside this it means that the RC replica circuit will have to see exactly the same switching conditions (Ron of the switch, charge injection, clock feedtrough, parasitic cap, etc).
This is hard to achieve in real nm technology.


So I come to a new idea:
- sample the voltage value in 2 points in time at the end of the sampling time (right before the switch goes off)
in Cadence it can be done with value(VT(signal) time)
- calculate the delta in voltage between those 2 samples .
if the delta is less than a "certain value" it means that it was settle with "X accuracy".


the "certain value" and "X accuracy" have to be calculated manually

I did not implemented yet in a real simulation but I was thinking at this approach in the evening...
Not sure if it really give the wanted results ...

Thanks anyway for your inputs.