Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How to keep Bandgap output voltage as constant ?

Status
Not open for further replies.
I couldn't understand whay you write, The BGR will generate output voltage independable on the VDD. The change is small with VDD change.
 

The BGR I designed also has bad stability.The output votage changed with the variety of VDD.
The OA is correct and good performance, and I also used cascode. All transistors work in saturation.
When VDD changed between 8v to 18v,the output changed about 20mv.I don't know why.

I hope someone can tell me how to improve the PSRR!Thand u very much!!!
 

The key point to design a low temp. drift bandgap reference is the performance of opamp,i think possibly the op didn't work well over your interested power supply range . so , high gain , enough phase margin, high psrr ,small bandwidth of opamp is needed for small TC of output over temp. range &power supply range.

br,
sorata
 

First you need design good PSRR circuit,
Second you need buffer and fliter the VBG node.
 

just like yaxazaa said
if AMP is good ,then try put a cap at the output
 

your current is too large ~~~~~
i met the trouble .smaller your current in bandgap regeration branch.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top