How to hspice simulate PWM one bit DAC INL DNL

[tekno1]

simulate pwm signal

Hi All,

What is the best methodology of simulating INL and DNL of PWM one bit DAC (or any PDM one bit DAC like Delta Sigma).

I use HSPICE but considering settling time and number of codes to be simulated one by one (setting PWM frequencies one by one) manually would be very time consuming.

I am getting phase accumulator type PWM signal for one bit DAC.

Thanks in advance for any help, suggestions or resources.

 

[MikeR]

hspice dac

what models of devices you use? Are you have models with statistical? You can set number points on lineary changing signal and see M and sigma in Monte-carlo analisys.

 

[tekno1]

how to simulate inl of dac

Thanks. I am mainly interested deterministic INL DNL. At this point I am not interested random variations. First I want to get deterministic part but because of serial input and long settling times I wonder how people can handle efficiently INL DNL simulations for PWM DAC.

Thanks in advance for any help.