How to go about solving these circuits?

[therash09]

I am having problems in solving two questions belonging to Circuits.

Question 1 can be found at the link given below:
https://picasaweb.google.com/11636060715…
or

Given is a circuit having a pulsed aperiodic wave pattern, Vi. To be plotted are output waveform Vo, waveform across capacitor Vc and waveform across resistor Vr.

Question 2 can be found at the link given below:
https://picasaweb.google.com/11636060715…
or

To be found is the output waveform Vo, if the input to the circuit is a uniform square pulsed wave pattern.

While I have been able to almost entirely do Question 2, there seems some very basic conceptual error not leading to the correct answer. As for Question 1, I could find very little headway.

It would certainly not be possible for anyone to plot the waveforms here, and I do not expect anyone to plot the same for me on any other platform. What I require is the method to proceed with these questions and the steps, particularly for Question 1. The required waveforms could be vaguely mentioned in statements, as these answers shall be of utmost help, alongside the methodologies!

I will be extremely thankful to everyone who answers!

 

[BradtheRad]

The capacitor and resistor are arranged to create spikes.

By pulling the left end of the capacitor high or low, you create a spike to the right of it.

A positive-going edge results in a spike quickly upward, then less quickly downward to zero.

A negative-going edge results in a spike quickly downward, then less quickly upward to zero.

A simple logic gate changes state when the input crosses a volt threshold in the middle region.

By the way, the inverter input is exposed to negative polarity in your image #1. This is supposed to be bad for a real digital device.

If you didn't know all of the above, perhaps it enables you to figure out what happens.

But after saying all that, it's easier to watch it in a simulator, than to read a long explanation.
Have you tried the animated simulator at www.falstad.com/circuit?

On the other hand, there's nothing wrong with wanting to figure it out yourself. It's an excellent trait, to want to think things through. It got Sherlock Holmes where he is.

It's just that the electronics field has become so vast, that you might as well make it easy on yourself.

So I used a simulator to see what is going on. The falstad simulator can react immediately to your input, and plot response graphs. I could easily post the image here, but I suspect you do not want to have the answer handed to you.

By the way, your images appear fine. However the links go to '404 not found'. They are truncated in your post.

I often use www.tinyurl.com to shorten a long web link.

 

[pnsakanjankumar]

1. For the case Vi=’0’ NAND_Out=’1’
For long time Vr will be 0 Therefore Vout=’1’
Now even when Vi=’0’->’1’
NAND_Out=’0’ therefore Vr will be ‘0’ so Vout will be ‘1’ again.
This case will be of no use.
2. For the case Vi=’1’ NAND_Out=’1’ or’0’ (depending on the another i/p)
For long time Vr will be 0 therefore Vout=’1’ implies NAND_Out=’0’
Now when Vi=’1’-> ‘0’ NAND_Out=’0’ -> ‘1’ Vr will start to decrease exponentially
At the start of decrease (>Vdd/2) Vo=’0’ . Since input is a trigger Vi will be ’1’
Since Vo=’0’ and Vi=’1’ NAND_Out=’1’ (i.e there will be constant Vdd till Vr decreases)
Vo=’0’ till Vr will be >Vdd/2 Now when Vr<Vdd/2 then Vo=’1’ leading to a normal state.

Therefore we can say Vi=’1’ is the normal state and trigger will be ‘1’->’0’->’1’ and Vout=’1’->’0’->’1’ ‘0’- for discharge time T=0.693 RC. This circuit works like a monostable multivibrator.

If u have any doubts let me know.

With regards,
Anjan Kumar.