How to get 20 different carrier frequencies?

[E Kafeman]

But i need to know trigger edge with maximum precision

Edge detection make things worse as it will depend on actual received amplitude. Due to channel fading and noise is zero detection more common.

I can read data with 1 ps precision

For OOK, keying time resolution is inverse to bandwidth and keying time error can never be better then inverse center frequency. 1pS=>1THz. In that range is also temperature a complicated error source.
University of Oulu have succeed developing a conventional electronic OOK timing detector with an error of less then +/-55pS a few years ago. They are sure interested of your 1pS solution: **broken link removed**

 

[Kaspars]

Excuse me, but that's what people call ignorance. Related to CC1101 properties, you're just guessing, isn't it?

A microcontroller or similar system will be in fact needed to configure the CC1101, so if you don't like microcontrollers, that's a different problem. But it shouldn't be confused with the effects of time discrete signal processing.

Please read more about ASDM. CC1101 can be used, but it require to use CLK and MCU. There will be CLK error. And output isn't time discrete signal, it's more like analog signal only with two values.
All I want is an idea about analog data transmision. So if someone know the method to to this, please inform me.
Thanks

 

[FvM]

To close the CC1101 discussion from my side, I must admit, that I don't know if the data input is sampled by an internal clock in asynchronous operation mode or transmitted directly.

I completely agree with E.Kafeman about the relation of time resolution and bandwidth in "analog" channels. Although stronger limitations can be expected for the demodulator, you can start with the analysis of a very basic OOK, FSK or PSK modulator. Just a carrier source (e.g. a 433 MHz sine) and an ideal modulator (e.g. an on/off switch). Now it happens, that the carrier is switched once near the zero transition and once at the sine peak. What does this simple example tell about achievable time resolution?

 

[E Kafeman]

Feel free to read this:
Event Timing

I have read. As far as I understand is their real time resolution many many many decades behind your 1pS. They can calculate a difference in time when something something occur for a signal, or comparing two signals, ranging from sub-Hz to kHz via a rather normal A/D-converter and polling a 100MHz counter. As best do they have the 100 MHz clock precision, 10 nS. For a million samples can they mathematically improve relative timing results and deliver a numeric result with high precision via a TCP/IP network or parallel-port.

It seems not related to neither OOK or ASDM?

I have done big job to analyse ASDM

As I see it, is it to much oversampling to be practical and reduces total performance if built with known technology, but I guess you have some kind of reason.
In a free running ASDM with 1 pS resolution is fastest possible round-trip a bit shorter then 1 pS. If no analog signal is applied do Sigma detector switch state with 1 THz. Main part of system delay is decided by the integrator but a common delay bottleneck is the Sigma-detector.
The Sigma-detector do also need to have a certain power gain to deliver a well defined square-wave output as it is important to keep total coding error low. It also needs to have high input impedance to avoid loading the integrator and a stable Smith-trigger characteristic.
Assume ideal zero delay, for moderate s/n requirement, say 30dB for an analog LF signal, full p-p (noise-floor 30 dB below that amplitude). We do then need a power bandwidth in range of fS in a pS-resolution system (a 1 THz square-wave should look like a square-wave and not add to big integration error).
fS wavelengths is were we find X-rays. Is that not rather extreme in your analyse?

Please read more about ASDM

Have done so. Have also designed several ASDM's. One worth to mention, were integrator delay and losses is compensated for in output result, using successive error correction via a integrated demodulator for feedback against a analog delayed input signal. It resulted in improved coding of weak/slow signals and reduced decoded amplitude distortion.
Better then 60 dB s/n for 0.1-49 Hz which is hard to reach in a standard free-running ASDM. Not really terahertz and not extreme but good results anyway, for something built with simple discrete components. It was used for mobile recording of medical related signals.
Just so you know that I have at least some knowledge around different types of DAQ technologies, even if you seems to be long ahead and in forefront in this area.

If you want us to read more about ASDM to better propose you a radio system according to your requirement, please provide better related links or explain why this "event timing link" was related.

 

[FvM]

As far as I understand is their real time resolution many many many decades behind your 1pS.

I fear, the link describing an Event Timing measurement instrument doesn't manage to explain it's operation principle clearly, from additional literature, it looks like a typical analog-digital hybrid, utilizing usual time-to-voltage converters for the ps resolution. Single shot uncertainty is said to be rather 10 ps than 1 ps, by the way. I guess, Kaspars posted the link just to show that ps time intervals can be measured, which should be taken as granted in my opinion.

It seems not related to neither OOK or ASDM?

Not particularly.

Better then 60 dB s/n for 0.1-49 Hz which is hard to reach in a standard free-running ASDM.

I appreciate to hear some empirical ADSM results. It would be helpful to know the key parameters of the discussed system as well.

I wasn't yet engaged with ADSM, but I understand that amplitude resolution converts into timing resolution. If you have an ASDM toggling at 1 kHz without input signal, you need 1 ns (or is it 0.5 ns?) resolution to achieve 20 Bit accuracy. Sampling the asynchronous bit stream at low rates will cause high quantization noise levels.

Before designing a multi channel system, you would want to determine state-of-the art for available RF transmitter-receiver pairs. We can expect a principle time resolution restriction of the modulator and demodulator when reproducing single events. In addition, the channel bandwidth creates a timing distortion for the continuous bit stream, you would need to analyze if it converts into an additional error of the decoded signal or possibly averages to zero. Finally channel noise converts into timing jitter and further into amplitude uncertainty.

 

[E Kafeman]

Maybe am I a bit formalistic about what real time resolution is and do not accept this EventTiming instrument as something having a real resolution in the nS range, but as a comparison:
It is a bit like a typical network analyzer with upper frequency limit 3GHz, which can measure cable-length with fS resolution. If real time resolution is in nS range, how can it handle signals in fS range? It can't! It is just calculated and interpolated numbers from available measured data (with bandwidth below 3 GHz).

Real time signal resolution can not be better then the actual bandwidth, which is relative moderate in this Event Timing instrument. In my opinion is this Event Timing instrument not able to handle anything in pS range, it is calculated numbers based on relative low bandwidth measurements.
If I understand datasheet correct is useable input signal bandwidth less then 100 kHz in single shot mode and for a repetitive signal 50 Hz. It is probably a limitation to allow for some processing between each pulse. There are also other things that limits how fast signals it can handle at signal input.
As RF engineer did I react on the analog delay, about 5 meter, close winded as it was single shield (lossy) coax, but even worse, was it connected to low-cost BNC connectors:

(Wednesday0915.pdf). Not serious RF, but as it actually not need to handle any RF is it probably good enough.
These BNC inputs are used for trig of internal calculations and as long as it is relative long risetime of trig-signal do it probably work ok, but trying to feed these inputs with complex pulses or signals with XX GHz bandwidth would give very unpredictable result. Even at 1 GHz do I not recommend BNC in a professional design and these do I assume have a self-resonance below 10 GHz.

Principe for what they call EET (Enhanced Event Timing), is relative understandable in **broken link removed**
Reminds me a bit about how the 15-pin d-sub for joystick was designed that was common on PC 10 years ago. The joystick did contain variable resistors. A software trig started a internal clock and also started charging a cap via joystick resistor until a certain voltage stopped the clock. Number of clock ticks did correspond to resistor value.
In this case are same main components used as for the joystick but in a bit different configuration. It is the incoming signal that is the trig that polls a clock via a integrator.
Via A/D is remain done in software. A bit simplified . Existing models do not seem to have implemented the 100 MHz RTC with GPS sync but it is described in some papers as a possibility to add a real time stamp.

 

[FvM]

I won't relate single shot timing measurement to signal bandwidth. The instrument isn't dealing with periodical signals. There's a lot of applications for an instrument of this kind, e.g. time-of-flight distance measurement, doppler flow measurement etc. You'll get in fact at least three timing parameters: timing resolution in repeated averaged measurements, single shot resolution, repetition rate.

I think, we don't need to discuss the properties of this instrument, because it's not exactly relevant for the present ASDM problem. I see a certain similarity in so far, that the ASDM binary output signal has a low (e.g. kHz range) edge rate, but the edge positions need to be transmitted with e.g. < ns error to reproduce the input signal with intended accuracy.

 

[E Kafeman]

Yes correct ASDM timings is important. In ideal theory is ASDM a simple beauty with infinite short pulses and for DA-converter is a simple RC-network enough.
In reality with nonlinear integrator, other delays not related to ideal integrator, and a hysteresis trigger that is nonlinear and unstable both at input and output and much else that most be optimized for, by inserting different kinds of error corrections can it be real complex circuit.
A simple solution to correct timing errors is by reduce free-running frequency, by increasing tau for the integrator and/or insert a clock. Other delays do then becomes relative less dominant and output levels becomes more stable which reduces total distortion.
Clocked data can also be of value if digital output should transferred as ook as it becomes easier to optimize use of available bandwidth and avoiding to try to modulate half sine-waves by using same main clock for both generate and gating TX carrier. Synchronous data is in that case an improvement from distortion view.
In general is it much easier to achieve a good result by buying an existing well working solution, were most important of error correcting functions exist as programmable options, such as http://www.imst-dsi.com/en/ip-cores-and-soc-solution/adc/14bit-sigma-delta-adc.php.

 

[FvM]

Clocked SDMs are everywhere these days, and I don't have doubts, that it's an appropriate technique to send analog data over a RF channel. Apparently, Kaspars' project is obligated to ASDM, evaluating it's capabilities. That's O.K. I think, even if we doubt to see mindblowing results. But it's a serious problem to suggest a suitable modulation/demodulation method, I fear.