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How to do the CMFB partition?

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ee484

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CMFB partition?

Hi, all.


How do you guys usually do CMFB partition?
Say, I designed a telescopic amp and I split the tail current into 2 transistors.
What is the current ratio between two?
I believe that the accurate way is we do loop gain simulation around CMFB (CM loop simulation) so that make CMFB loog gain crossover frequency is somewhat comparable with differential mode loop gain crossover frequency.
How do real designers do?

Can CMFB loop gain crossover frequency can be somewhat smaller than differential loop gain corssover? (That's what I heard....it is still safe)
I thought CMFB loop gain crossover had to be somewhat larger than differential loop gain crossover so that CM is well controlled before opamp works properly.
What is the reasoning behind it? And good reference, please suggest some..

The other question is I have seen that people assigned a tail current transistor fully used by CMFB. Thus, there is only one tail current transistor that contributes 100% for CMFB. What are the advantages and disadvantages of doing that compared to when we split the tail current into two?

Thanks....in advance!
 

Re: CMFB partition?

yes I agree with you that CMFB should generally response faster than differential loop. Otherwise the common mode of the signal would fluctuate.
If two transistors is responsible for CMFB, then you have 2 degree of flexibilities to adjust your common mode voltage. It depends on applications that one or two transistors handle common mode feedback. This is just my opinion. Any other advices or opinions are highly welcomed.
 

Re: CMFB partition?

hello,
i am a newbie in analog design but here is my opinion anyway :D
i was thinking that splitting the tail current in CM and using a resistance is to just to have a constant gm in large region of operation (= 1/R) , but i am now confused , can u plz upload ur CMFB circuit any other CM circuits u have PLZZZZZZ ?
thnx.
a.safwat
 

Re: CMFB partition?

CMFB I used is switched capaictor version - one in John and Martin book.
 

Re: CMFB partition?

Well....so far nobody really reply the question...-.-;

I found the one sentence ouf of Razavi's book about the topic.
"The feedback may control only a fraction of the current to allow optimization of the settling behavior"

Now, I know the spliting the tail current transistor into two (one for fixed bias and the other one for cmfb) has effect on settling time behavior.
But, I still don't know why some people use the tail current transistor 100% for cmfb, and others (like Razavi said) want to split the tail current into two - one for fixed biasing and the other for cmfb.

If anyone explain it, I'll really appreciate it.
I have been curious for long time...I sort of have idea but I am not sure.

Want to hear from experts...
 

Re: CMFB partition?

The concrete dynamic design of the CMFB depend on the type of regulation target and the opamp feedback network.

There are two techniques for the target. Output voltage or input CMFB regulation. For output regulation a specific stage is used. Detection is either by two resistors, two caps or by two active devices. The former two allows a complete voltage range. The last one mostly restricted by threshold voltage. In the case of input CMFB the opamp feedback network is used as detection. Then a part of the input stage current is used as CMFB.

For a perfect differential operating circuit the CMFB netwrok is quiet also in the presence of high signal levels. That is not true, especially for CMOS. So to reduce the impact of common mode nonlinearities on the differential signal some surpression is needed. So it is not only to define a bias operating point. The feedback network is on most cases very different for differential and common mode signals. That could require much different loop gains and poles. What helps is that the CMFB gain is mostly not signal performance related to the first order. So stability with less gain is easier. That approach tend to favor output CMFBs.
 

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