Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

how to design a switch with discharge path for the stored charges

Status
Not open for further replies.

bestvlsi

Junior Member level 1
Joined
Jan 8, 2011
Messages
17
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,452
LC VCO how to design a switch with discharge path for the stored charges

Hi there,

I am designing an LC VCO with switch capacitor bank in 0.18um process. This is being used in a radiation environment where it can face situation where there might be accumulation of charges in the capacitors due to radiation. At the moment I am using the topology as in the figure attached. In the picture attached, the external digital control is applied at the gate of the MOS transistor and the other end of the capacitor is connected to the output terminal of the VCO.

Could the VCO functionality be changed if the stored charge exceeds certain limit ?

Also is there any topology to discharge the stored charge in the off state of the switch ?

Regards
 

Attachments

  • edaboard 1.png
    edaboard 1.png
    1.3 KB · Views: 80
Last edited:

Could the VCO functionality be changed if the stored charge exceeds certain limit ?
Yes, it changes the total phase shift. The accumulated charge should have to be electronically discharged or reset periodically to achieve the required phase error.
Also is there any topology to discharge the stored charge in the off state of the switch ?
Yes you can find it across VCO design.
 

Hi varunkant2k,

Thanks for your reply. I get your first point that it affects the VCO , but can you please elaborate on the second point regarding the topology to achieve the same. What you said " Yes you can find it across VCO design." is not clear to me .... if you have any paper/research work on this ... i would appreciate if you can give some pointer or the name of the paper..

Regards
 

You can use a switch to short the cap when it is in the "off" state. This switch must be both weak and offer low drain cap
 

Also is there any topology to discharge the stored charge in the off state of the switch ?
One thing , main purpose of this is to reduce jitter. If you are so much bothered about jitter, then go for differential architecture. and various other architectures are available. You can improve your control voltage to react to your jitter.
-Varun
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top