How to design a pulse width modulator using VHDL?

[engrbabarmansoor]

how to design a pulse width modulator using vhdl?

 

[fguihot]

pwm vhdl

Hi !!!
It 's quite easy...

You built a free running counter. The bit size of the counter depends on the desired PWM command resolution. If you want a 8 bit command, then you have to build a 8 bit counter.
The counter 's clock is derived from your system 's clock.

frequency_counter=desired_frequency_pwm*pwm_bit_resolution

Then you implement a state machine like :
if counter= pwm_command
then pwm_output=1
if counter=0
then pwm_output=0

You should pay attention to the delay between pwm_command_refresh and pwm_output_refresh. It is easy to lost one or two cycles....