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How to design a difference amplifier with unity gain.

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DJP1992

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Hi All,
I was trying to design a difference amplifier to get a difference of two differential signals, say V1 and V2.
I intentionally used large resistors just to isolate the issue of resistive loading(which otherwise result in loss of opamp gain) but still i am unable to get the difference of two signals.
I observed that the DC voltage at the output of the opamp is close to 10mV (no matter what is the Commonmode value of input signals)which is forcing the output signal to stay close to VSS.:bang:

Is the wrong way to design a difference amplifier in analog design?
Please share your views on this.

Thanks,
Dhiraj
 

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Hi,

What's your source? Type, voltage, frequency, impedance.

With 100M resistors...an input offset current of 100pA causes an output offset of 10mV.

I think 100M are not useful. It causes a lot of errors in offset voltage and low bandwidth...

Decide to use a true "instrumentation amplifier" circuit.

Klaus
 

I think, you can use the shown circuit arrangement - however with "reasonable" resistor valus in the kOhm range.
Who has told you to use 100 Megohms?
 

you should first try ideal op-amp to see how it works. here Vout = V2-V1

What is the problem here ?

Of course it is related to your op-amp. If you have offset in your op amp it cause a deference in output voltage.

if there is a dc offset in ur opamp: Voff

then it becomes like this V2+2Voff - V1 =Vout

You should check your opamp design.
 

In your block diagram, use have used the classical symbol for an opamp (voltage-in and voltage-out).
Hence, in my previous answer I have assumed that you are using such an amplifier (off-the shelf).
However, in case you are designing another amplifier by yourself (which - as it seems - has no low-resistive voltage output) you cannot use the gain expression and circuit arrangements which were derived for ideal opamps only.
 

I tried the same thing with 10K reistors also but it was taking some current from output of difference amplifier so i thought that may be due to output current flow from opmap, the nmos of the opmap output is going to linear region resulting in 10mV output DC.
So i checked with 100M but in this case, evenif current flow is negligible,the output is close to VSS.
 

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Hi,
I checked the configuration with ideal opamp it works fine there.
I will check the offset point and come back to you.
Thanks
 

In your block diagram, use have used the classical symbol for an opamp (voltage-in and voltage-out).
Hence, in my previous answer I have assumed that you are using such an amplifier (off-the shelf).
However, in case you are designing another amplifier by yourself (which - as it seems - has no low-resistive voltage output) you cannot use the gain expression and circuit arrangements which were derived for ideal opamps only.

Hi LvW
You are correct to avoid the loss of gain due to low resistive loading , i used 100M resistors so opamp works fine.
 

Hi,

could you give some more information or a schematic with the OP-Analysis?
Did you attach a capacitor as load already? If you want to build an OP-AMP, I suggest using a source follower as output stage.
 

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