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How to decide on counting direction in a clock?

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anoop12

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hello all
I am anding two clocks a and b. a is upcounting clock and b is a down counting clock.
The resulting clock c is the clock that I have to use in my code.My problem is how to
decide whether the resulting clock is for up counting or down counting. what circuit
should I implement so that I will get direction of counting?


----------
a ----> | 2 input |------> c
b ----> | and gate |
------------

a ----> ----------
| flag ckt ?? | -----> direction bit
b ----> ----------

regards
 

Re: counting direction

1.) Why are you anding clocks, who has advised you to do that. I believe that isn't a good idea, if you are doing it to do an up/down counter.
2. There will be a single clock going to the up/down counter, and the direction of the count should be controlled by another signal/port say direction_up_down.
There is no answer to your question.
kr,
Avi
http://www.vlsiip.com
 

Re: counting direction

hi avimit,
I am designing 74193 synchronous up down counter. There they have used two clocks for up counting and down counting. So the issue.
regards
 

counting direction

hi,anoop12

had you try my way in your last post"dual clock counter"?
 

Re: counting direction

hello addn,
yes , it works fine. But the problem is how to utilize the flag signal from the circuit that you gave in counter program.
 

counting direction

I am a beginner

I tried .... but the construct is not Synthesizeable


Now I ask you people


Of the two clocks which one will be our reference ???

i.e. When will the count be updated in count register


I would like to know the particular use of such a counter

In my opinion it must have two Enable inputs a least one for each clock
 

counting direction

The 74193 is an ancient TTL counter that contains a gated clock and asynchronous logic (a set-reset flop that remembers which clock was pulsed). Consider using modern synchronous FPGA/CPLD design instead. Or are you required to emulate the 74193 for a school assignment?
 

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