j4y4nth1
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what is meant by this symbol 
=) , and tha (alias) siganal in VHDL and how to convert this into verilog plz help me,AND GIV ME REPLY AS SOON AS POS.........................
=) , and tha (alias) siganal in VHDL and how to convert this into verilog plz help me,AND GIV ME REPLY AS SOON AS POS.........................