Poomagal
Newbie level 6
I am writing verilog code for modular inversion algorithm, how write synthesizable verilog code to check a value inside the register is one(1) or not? kindly help on this.
for example if register u=1, then it should return TRUE/some other operation to be continued else FALSE.
how to do for this.
for example if register u=1, then it should return TRUE/some other operation to be continued else FALSE.
how to do for this.