matrixofdynamism
Advanced Member level 2
Operand isolation is where we zero certain inputs to modules when they module is required to process the input signal. This reduces switching activity in the design and thus saves dynamic power. This is one technique used in low power design.
The operand isolation can be implemented by using AND gates with enable signal. When enable is zero, the outputs are always zero. Else the input goes to output.
The operand isolation can be implemented by using D-Latch with enable signal. When enable is zero, the latch holds the last data value and does not tranfer changes at input data line to output. When enable is high, the latch is transparent.
The operand isolation can be implemented using multiplexer. When the enable is zero, the mux selects the input tied to '0' permanently. When enable is high, the actual data input is multiplexed to output.
The question is, how do we know which of these three approaches to use at a given time and place?
The operand isolation can be implemented by using AND gates with enable signal. When enable is zero, the outputs are always zero. Else the input goes to output.
The operand isolation can be implemented by using D-Latch with enable signal. When enable is zero, the latch holds the last data value and does not tranfer changes at input data line to output. When enable is high, the latch is transparent.
The operand isolation can be implemented using multiplexer. When the enable is zero, the mux selects the input tied to '0' permanently. When enable is high, the actual data input is multiplexed to output.
The question is, how do we know which of these three approaches to use at a given time and place?