venkatesankalidass
Junior Member level 3
dear all ,
now currently work with ACTEL FPGA
for i am using ACTEL IDE tool
in this design i have one problem
while i simulate and synthesis
ERROR: Mismatch between the portlist of the corresponding symbol of the
please help me
i whant to finish the project as soons as possible
regards
venkatesan.k
now currently work with ACTEL FPGA
for i am using ACTEL IDE tool
in this design i have one problem
while i simulate and synthesis
ERROR: Mismatch between the portlist of the corresponding symbol of the
please help me
i whant to finish the project as soons as possible
regards
venkatesan.k