help needed for switched current memory cell

[Jenifer_gao]

Hello Everyone:

I am trying to use a memory cell called switched current memory cell, which is using a switched current technology. It is a cascode cell shown in my attachment. The function of this circuit is as follows:

1. When Φ1 is active and Φ2 is de-active, a total current of J + Iin will flow through M1, the gate of the M1 will be charged corresponding to the total current.
2. When Φ2 is de-active and Φ2 is active. Because the voltage of gate M1 will not change, and as a result the M1 will draw the same current as the phase 1, that means: io = -Iin.

Theoretically, it makes a sense, but when I do the simulation, I don't know how I can observe the output current. I think node output should hook to some where, but i don't know how to do it. If anybody can give me some suggestions, or anybody can give me an example of your design and the simulation file. Thanks very much

 

[sunking]

do tr. analysis

maybe .pss of spectre can help you.

 

[Btrend]

try this: adding another memory cell as load

 

[eda4you]

To get it work you need a impedance at the output. If you have no load the transistor will get into the tríode region.

Hence, simply put another SI cell at the output or put simple a resitor as load. The dimension should be in such a way that the output voltage doesn't "cut off2 the current source at the top.