Help me with implementing ahb arbiter

[zwj_seu]

ahb arbiter verilog

Hi
everyone!

I want to implement ahb arbiter,but I just know the requst/grant timing from amba spec.I don't know how it works inner.

I know the implement of arbiter is not define in spec,and we can define it ourselevs.But it's hard for me.

Who could help me! Thanks!


zwj_seu

 

[wadaye]

Re: help for ahb arbiter

Yes, the AMBA spec doesn't mention detail implementation of Arbiter.

It's left to the designer to decide the Arbiter strategy and something like

this.

I think you can find some useful information about Arbiter in specific

product's use guide. In the guide, they will mention the strategy, and you

can compare the stragegy, and then you form your own.

wang1

 

[eda_wiz]

help for ahb arbiter

Suppose u have only 2 masters and an arbiter... when 2 masters requests for bus simultaneously .. which one do u wanna give grant signal.. write that in verilog and synthesise. to get a simple arbiter

 

[zhangpengyu]

Re: help for ahb arbiter

Hi
zwj_seu!

I think synosys design ware may help you!
You could download from its home page!


zhangpengyu

 

[godsun]

Re: help for ahb arbiter

yeah synopsys dw support amba spec, but it is IP and be encrypt
synopsys edatool is coreConsultant, it can generate AHB module

 

[wadaye]

Re: help for ahb arbiter

yeah synopsys dw support amba spec, but it is IP and be encrypt
synopsys edatool is coreConsultant, it can generate AHB module

Yes, you can use coreConsultant to confige the IP you need. But you

need to buy this Ip from syn0psys, otherwise you can't confige the IP.

And you can't read it into DC.

wang1

 

[spauls]

Re: help for ahb arbiter

I can help you,
Last year i write the code of arbiter, but due to somesecurity and issues reasons i cant put my code openly in foroum, you can contact me personally, i will help you

 

[kidman]

Re: help for ahb arbiter

Hi
everyone!

I want to implement ahb arbiter,but I just know the requst/grant timing from amba spec.I don't know how it works inner.

I know the implement of arbiter is not define in spec,and we can define it ourselevs.But it's hard for me.

Who could help me! Thanks!


zwj_seu

If the spec tells you the detail to implemention, you will be a coding guy, not designer.

 

[Michael.Yang]

Re: help for ahb arbiter

I can help you,
Last year i write the code of arbiter, but due to somesecurity and issues reasons i cant put my code openly in foroum, you can contact me personally, i will help you

hi,
spauls, can you give me some advice? now i am being puzzled by the abitration issues, thanks in advance

 

[eda_wiz]

help for ahb arbiter

whats ur question

 

[Michael.Yang]

Re: help for ahb arbiter

Yang..
shoot your questions... may be I can help u

rgds
whizkid

hi whizkid

question
i want to design the grantx signals as register output. But for a undefined length burst transfer, we can not predict the end of transfer, the grantx signals change always one cycle later than expected. for a fixed length burst transfer, because the master may insert a BUSY state before the last SEQUENTIAL burst. we still can not predict the end of the burst transfer.so, when we changing the grantx signals, the former master may have began another transfer but the the bus access still may be taken away.

should i insert idle transfer to the end of each burst transfer?
if yes, how many idle transfers should be inserted?
and, should i insert idle transfer to the end of single transfer?
urge for your reply, thanks a lot

[/url]