Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
One choice is to use a first transistor with lower 1/f noise.
Another is to use a step up transformer to raise the source voltage which allows you to reduce the gain of the active part of the amplifier. This usually works if the amplifier input impedance is much higher than the source impedance. This option is overlooked in modern days because transformers cost much more than small signal transistors.
If there will be no wanted signal components at these low frequencies, you can move the low end 3 dB frequency higher.
To reduce the 1/f noise:
1) use a PMOS input transistor instead of a NMOS. The Flicker noise is lower, but has the mobility is also lower, you'll need bigger transistor (which mean higher input load) or higher current for the same gain
2) use a big input transistor. Flicker noise has a 1/W rule. But again increasing the size of the transistor increases the input cap.
3) use chopping. you can almost completly cancel the noise. but it means you need to add the switches, the clock. if you use switched cap circuit, it's not a problem, but for continous time it might add some difficulties
To my knowledge those are the main techniques...
I agree to the comment that the frequency of operation is important to sort out this problem. Even if the accuracy requirement is too high the the given solution of using pmos may not be capable of doing so. That time you may have to intoduce some calibration technique etc. to sort it out.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
