three noise maker, but different output offset

[canlu]

hi.
i have this circuit with op37 op-amp, and repeated three time.

but at output i have different offset according to pictures:

every thig is same and resistor's are 1%.
even in the output i have mkt cap.
what can cause such behavier in this circuit?

 

[betwixt]

Where are you scoping the three signals and under what conditions?
What supply voltages (VCC and VEE) are you using to the ICs?

Brian.

 

[canlu]

Where are you scoping the three signals and under what conditions?
What supply voltages (VCC and VEE) are you using to the ICs?

@room tempratore +- 15V
non-isolated osiloscope and three circuit Isolated By MinMax DC-DC (MAU327) and without x-cap

 

[D.A.(Tony)Stewart]

It is clipping from excess gain. Verify your R values.

 

[KlausST]

It is clipping from excess gain. Verify your R values.

I agree, it´s clipping.

But maybe because of the noise of the power supply input.
I´d rather refer D1 to the same GND as R2.

Klaus

 

[canlu]

it's the real schematic, and yes d1 has same GND as R2
oscop connect between GND and pin2 of J1
thank for replay

 

[KlausST]

Hi,

it's the real schematic,

What a nonsense to first show a totally different schematic, with different part values, different OPAMP type, different gain ....


Klaus

 

[FvM]

Additional problem, large DC output offset of 2nd stage due to 11k overall DC gain, therefore asymmetrical clipping. 1st stage input offset is dominated by input bias current voltage drop. OP 37 isn't well suited for large source resistance. You want to use AC coupling between stages and FET amplifier for 1st stage.

 

[canlu]

secound amplifire isn't important. secound stage is not placed...!
how it would be different offset after C1(MKT)

 

[FvM]

secound amplifire isn't important. secound stage is not placed...!

O.k., first stage is already clipping and has large offset. Unsuitable OP, gain too large.

 

[D.A.(Tony)Stewart]

These Op Amps have a high bias current (compared to 1pA FET input buffered types) your design which has mismatched high 1Meg and 1k source resistors with a gain of 11k which can produce an offset.

Also you may want to unclip the white noise to avoid introducing harmonic distortion.

- pin 1 is normal clipping +/-15V with measurement errors on DSO with capacitor charge.

Try showing J1-3 from U0-6 (haha BCD encoded RefDef)

 

[canlu]

I received the circuit today.In the reviews,
I saw that there is an offset at the displayed point.

What causes the offset at this point?
(capacitor's is MKT)
and even after c1 i have offset
Does the capacitor not eliminate DC?

 

[D.A.(Tony)Stewart]

You need a load R to 0V no DC.
R*C =T to 63%

Reduce R4 to <100k

 

[canlu]

You need a load R to 0V no DC.
R*C =T to 63%

Reduce R4 to <100k

What is the result of reducing gain?

 

[danadakk]

What is value off offset you read ? Max Ibias x 1Mohm to ground = Voffset = 35 nA x 1,000,000 ohms = 35 mV.

If you disconnect C4 what offset do you read ?


Regards, Dana.

 

[D.A.(Tony)Stewart]

What is the result of reducing gain?

You have two different schematics
#1 has 2 stages each x10 with DC coupled outputs.
then you show another schematic with 1st stage with 1Meg and 60 dB gain with saturation almost 30Vpp and AC couple with large caps that with a single shot capture can show a DC offset due to the cap not being discharge to 0V

So reducing the gain is necessary to prevent clipping then let the output settle to 0Vdc after several time constants.RC=T if you want to AC couple.
So your 3 different results have undefined capture conditions. What are all the assumptions we should know?
OK?

 

[canlu]

i'm now understand. thank's
D2 is 9.4V Zener So by removing C4 input offset Would be 9.4V
i'll change R4 Value and Measure Value's..
@D.A.(Tony)Stewart
l Measure value and inform theme
thank's so much

 

[D.A.(Tony)Stewart]

i'm now understand. thank's
D2 is 9.4V Zener So by removing C4 input offset Would be 9.4V
i'll change R4 Value and Measure Value's..
@D.A.(Tony)Stewart
l Measure value and inform theme
thank's so much

No do not remove C4

 

[canlu]

i have -116mV, + 267mV signal there.
decreasing R17 to 500k not affect.
i'll test decreasing R4 tonight.

 

[danadakk]

The OP37 Ibias is a max of 40 nA, so a change from 1M to 500 K
would only change the Voffset due to Ibias from 40 mV to 20 mV.
worst case. So that would be x gain to find the output. The typical
offset is 10 nA so that would be much less.

So Vout = 1001 x 20 mV ~= 20V which would sat the OpAmp output.

Either drop G or get OpAmp with much less Ibias. Or add offset adjust
circuit :

https://www.analog.com/media/en/training-seminars/tutorials/MT-037.pdf

Regards, Dana.