aarthy_maya
Junior Member level 3
Hi all,
I am trying to do function verification using System Verilog. I have DUT developed in Verilog. The DUT is very complex.
I would like to run multiple test on this DUT, from batch mode. The compilation and elaboration of the DUT takes long time in the whole simulation process.
So I am wondering is there a way I can compile, elaborate the DUT alone (leaving the IO, top level test-bench and stimulus generator) and store it a place, and use this elaborated library with say test0.sv, test1.sv and so on in the later stage. As there is literally no change in DUT.
Could some one help me on this. Whether what I'am considering is sane way to do the verification. ?
On additional note, I am using Cadence Incisive Simulator. I tried to learn the snapshot concept. Since I am new to this functional verification, I don't understand the functionality of snapshot. Could someone also explain whether snapshot concept is meant for this method(multiple test bench on Singe DUT) of functional verification?
Thank you in advance.
Regards,
Aarthy
I am trying to do function verification using System Verilog. I have DUT developed in Verilog. The DUT is very complex.
I would like to run multiple test on this DUT, from batch mode. The compilation and elaboration of the DUT takes long time in the whole simulation process.
So I am wondering is there a way I can compile, elaborate the DUT alone (leaving the IO, top level test-bench and stimulus generator) and store it a place, and use this elaborated library with say test0.sv, test1.sv and so on in the later stage. As there is literally no change in DUT.
Could some one help me on this. Whether what I'am considering is sane way to do the verification. ?
On additional note, I am using Cadence Incisive Simulator. I tried to learn the snapshot concept. Since I am new to this functional verification, I don't understand the functionality of snapshot. Could someone also explain whether snapshot concept is meant for this method(multiple test bench on Singe DUT) of functional verification?
Thank you in advance.
Regards,
Aarthy