arkoudinos
Newbie level 4
I'm trying to develop an optimized version for the FS motion estimation algorithm in hardware (FPGA design) in order to further develop an embedded system including it. However, it would be very helpful if I had a simple implementation (in VHDL preferrably) of this algorithm in order to study it and use it as a reference design.
I've found some architectures proposed in a few papers, however it would be a bit waste of time to implement one of these from scratch. Could someone point me to an example in order to synthesize it and begin the rest of my work?
Thank you in advance
I've found some architectures proposed in a few papers, however it would be a bit waste of time to implement one of these from scratch. Could someone point me to an example in order to synthesize it and begin the rest of my work?
Thank you in advance