FPGA implementation of Log function

[ammassk]

dear all

How can I implement log(1+exp(x)/1-exp(x)) in FPGA?suggest me the best method for this implementation. If any sample code available, please give me.

 

[TrickyDicky]

use a LUT (ie a ROM, with X as the address).

 

[ammassk]

In my project x is a huge matrix(100 columns and 56 rows). How can I write code for these much values to put in LUT?Also i need to take each value of these from the memory for the further computations. ROM I can't use, I think. Is there any method to implement this?

 

[FvM]

In my project x is a huge matrix(100 columns and 56 rows). How can I write code for these much values to put in LUT?

The look-up-table can generate output for different values sequentially, one per clock cycle.

If the x values are constants, the calculation can be performed at compile time.

 

[ammassk]

100 by 56 matrix consists of 5600 real values. How can I store these real values into LUT?

 

[FvM]

I think, the question has been already addressed in your previous thread https://www.edaboard.com/threads/263091/

It's still not completely clear what you try to achieve, if you are talking about an array of constants or a RAM that can take different values during run time. The solution of the log function question also depends on it.

It has been previously mentioned that real numbers can't be synthesized to FPGA hardware. They can appear however in constants and intermediate values of compile time calculations. To represent real numbers in hardware, floating point or fixed point number formats are used.

 

[ammassk]

It has been previously mentioned that real numbers can't be synthesized to FPGA hardware. They can appear however in constants and intermediate values of compile time calculations. To represent real numbers in hardware, floating point or fixed point number formats are used.

I didn't understand how to use the fixed point formats in this context.Can you please explain it?

 

[jimwu88]

If you have access to Xilinx System Generator, it has a reference block that uses Cordic to calculate natural log.

dear all

How can I implement log(1+exp(x)/1-exp(x)) in FPGA?suggest me the best method for this implementation. If any sample code available, please give me.

 

[mrflibble]

I didn't understand how to use the fixed point formats in this context.Can you please explain it?

Not sure what you don't understand about it. If it's in general, a random google for "fixed point floating point difference" finds some useful explanations.


Also ...

log(1+exp(x)/1-exp(x))

and

In my project x is a huge matrix(100 columns and 56 rows).

I'll assume that your function is not exactly what you are saying, but rather what you think you are saying. You probably mean you have 5600 matrix elements, and you perform the function log(1+exp(x)/1-exp(x)) for each of these elements on an indivual basis. If that is indeed the case then you do what's already been suggested. Iterate over the 5600 elements, and use a lookup table to perform the calculations. Assuming a lookup can be done in a single clock cycle that means 5600 cycles to handle the entire matrix.

And if you think to be doing log(1+exp(X)/1-exp(X)) where X really is a 100x56 matrix then I'm afraid you're in very serious, grave, deep trouble my friend.

 

[ammassk]

I need to do what exactly meant u first( You probably mean you have 5600 matrix elements, and you perform the function log(1+exp(x)/1-exp(x)) for each of these elements on an indivual basis).is der any sample code available to calculate log function?

 

[mrflibble]

Is there any sample code available to calculate log function?

You can just google for some generic code with a lookup table. That'll have a function in it that fills some ram with values. Then all you have to do is plug in your favorite function. Or what you can do is write a matlab script that calculates your function, and spits out lines of verilog code. Then you include this verilog file. I think for this function that's what I'd do.

Or like Jim suggested, use a cordic core.

 

[Aya2002]

as still I am beginner in Verilog, I found some codes for the trigonometric functions as follows:

---

Code Verilog - [expand]
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function real sin;
  input x;
  real x;
  real x1,y,y2,y3,y5,y7,sum,sign;
  begin
    sign = 1.0;
    x1 = x;
    if (x1<0)
      begin
        x1 = -x1;
        sign = -1.0;
      end
    while (x1 > 3.14159265/2.0)
      begin
        x1 = x1 - 3.14159265;
        sign = -1.0*sign;
      end  
    y = x1*2/3.14159265;
    y2 = y*y;
    y3 = y*y2;
    y5 = y3*y2;
    y7 = y5*y2;
    sum = 1.570794*y - 0.645962*y3 +
           0.079692*y5 - 0.004681712*y7;
    sin = sign*sum;
  end
endfunction
 
The cosine and tangent are computed from the sine:
 
function real cos;
  input x;
  real x;
  begin
    cos = sin(x + 3.14159265/2.0);
  end
endfunction
 
 
function real tan;
  input x;
  real x;
  begin
    tan = sin(x)/cos(x);
  end
endfunction
 
 
function real rootof2;
  input n;
  integer n; 
  real power;
  integer i;
  
  begin
    power = 0.82629586;
    power = power / 10000000.0;
    power = power + 1.0;
    i = -23;
    
    if (n >= 1)
      begin
        power = 2.0;
        i = 0;
      end
 
    for (i=i; i< n; i=i+1)
      begin
        power = power * power;
      end
    rootof2 = power;
  end
endfunction
 
 
function real exp;
  input x;
  real x;    
  real x1,power,prod;
  integer i;
  begin
    x1 = fabs(x)*1.44269504;
    if (x1 > 255.0)
      begin
        exp = 0.0;
        if (x>0.0) 
          begin
            $display("exp illegal argument:",x);
            $stop;            
          end
      end
    else
      begin
        prod = 1.0;
        power = 128.0;
        for (i=7; i>=-23; i=i-1)
          begin
            if (x1 > power)
              begin
                prod = prod * rootof2(i);
                x1 = x1 - power;
              end
            power = power / 2.0;
          end
        if (x < 0)
          exp = 1.0/prod;
        else
          exp = prod;
      end
  end
endfunction
 
 
function real log;
  input x;
  real x;
  real re,log2;
  integer i;
  begin
    if (x <= 0.0)
      begin
        $display("log illegal argument:",x);
        $stop;
        log = 0;
      end
    else
      begin  
        if (x<1.0)
          re = 1.0/x;
        else
          re = x;
        log2 = 0.0;
        for (i=7; i>=-23; i=i-1) 
          begin
            if (re > rootof2(i))
              begin
                re = re/rootof2(i);
                log2 = 2.0*log2 + 1.0;
              end
            else
              log2 = log2*2;
          end
        if (x < 1.0)
          log = -log2/12102203.16;
        else
          log = log2/12102203.16;
      end
    end
endfunction   
 
 
 
function real pow;
  input x,y;
  real x,y;
  begin
    if (x<0.0)
      begin
        $display("pow illegal argument:",x);
        $stop;            
      end    
    pow = exp(y*log(x));
  end
endfunction
 
 
function real sqrt;
  input x;
  real x;
  begin
    if (x<0.0)
      begin
        $display("sqrt illegal argument:",x);
        $stop;            
      end    
    sqrt = exp(0.5*log(x));
  end
endfunction
 
 
function real atan;
  input x;
  real x;
  real x1,x2,sign,bias;
  real d3,s3;
  begin
    sign = 1.0;
    bias = 0.0;
    x1 = x;
    if (x1 < 0.0)
      begin
    x1 = -x1;
    sign = -1.0;
      end
    if (x1 > 1.0)
      begin
    x1 = 1.0/x1;
    bias = sign*3.14159265/2.0;
    sign = -1.0*sign;
      end
    x2 = x1*x1;
    d3 = x2 + 1.44863154;
    d3 = 0.26476862 / d3; 
    s3 = x2 + 3.3163354;  
    d3 = s3 - d3;  
    d3 = 7.10676 / d3; 
    s3 = 6.762139 + x2;
    d3 = s3 - d3;  
    d3 = 3.7092563 / d3;  
    d3 = d3 + 0.17465544;  
    atan = sign*x1*d3+bias;
  end
endfunction

---

and you can find the original text in this paper: Verilog Transcendental Functions for Numerical Testbenches

 

[ammassk]

Cordic will give function arctanh,Where log(1+x/1-x)=2*arctanh.Using cordic how can I find out my function ln(1+exp(x)/1-exp(x))?

- - - Updated - - -

 

[mrflibble]

Through the process of calculation. Or, you know, by using a lookup table.