n_sanjay_n
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Hey everyone,
I want to implement an equation involving heavy fixed point math. I have posted the code below.
The problem: I want to form the equation in the for loop. To do that, I must declare a 2D array for both "dv" and "v".
I tried using a type declaration statement, but works only inside an architecture (trouble for declaring dv).
Can someone help me out????
I want to implement an equation involving heavy fixed point math. I have posted the code below.
The problem: I want to form the equation in the for loop. To do that, I must declare a 2D array for both "dv" and "v".
I tried using a type declaration statement, but works only inside an architecture (trouble for declaring dv).
Code VHDL - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 library IEEE; use IEEE.std_logic_1164.all; use IEEE.numeric_std.all; library floatfixlib; use floatfixlib.math_utility_pkg.all; use floatfixlib.fixed_pkg.all; entity xxx is port(Ie: in sfixed(17 downto -110); dv: inout sfixed);------Here's the problem end xxx; architecture neu of xxx is type dataout is array (6 downto 0,11 downto -55) of sfixed;------this declaration is after dv is defined...so dv is of unknown format!!!! signal Cm, Gl, Gl_Cm, El, A, dt: sfixed(8 downto -55); signal v: dataout; begin Cm <= to_sfixed(0.0000000002, Cm); Gl <= to_sfixed(0.00000001, Gl); Gl_Cm <= to_sfixed(0.02, Gl); El <= to_sfixed(-0.07, El); A <= to_sfixed(0.000000002, A); dt <= to_sfixed(0.00646, dt); v(0) <= to_sfixed(0, v(0)); dv(1) <= ((Gl_Cm*El)+(Ie/(A*Cm)))*dt; v(1) <= v(0)+dv(1); process(dv, v) begin for i in 2 to 1500 loop dv(i) := (Gl_Cm*(v(i-1))+(Gl_Cm*El)+(Ie/(A*Cm)))*dt;-------is this for loop declaration correct???? v(i) := v(i-1)+dv(i); end loop; end process; end neu;
Can someone help me out????
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